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Commit 50da9d43 authored by Ingo Molnar's avatar Ingo Molnar
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Merge branch 'x86/fpu' into x86/asm



We are about to commit complex rework of various x86 entry code details - create
a unified base tree (with FPU commits included) before doing that.

Signed-off-by: default avatarIngo Molnar <mingo@kernel.org>
parents 3357b0d3 c128dbfa
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+4 −5
Original line number Diff line number Diff line
@@ -125,11 +125,10 @@ extern const char * const x86_bug_flags[NBUGINTS*32];
#define boot_cpu_has(bit)	cpu_has(&boot_cpu_data, bit)

#define set_cpu_cap(c, bit)	set_bit(bit, (unsigned long *)((c)->x86_capability))
#define clear_cpu_cap(c, bit)	clear_bit(bit, (unsigned long *)((c)->x86_capability))
#define setup_clear_cpu_cap(bit) do { \
	clear_cpu_cap(&boot_cpu_data, bit);	\
	set_bit(bit, (unsigned long *)cpu_caps_cleared); \
} while (0)

extern void setup_clear_cpu_cap(unsigned int bit);
extern void clear_cpu_cap(struct cpuinfo_x86 *c, unsigned int bit);

#define setup_force_cpu_cap(bit) do { \
	set_cpu_cap(&boot_cpu_data, bit);	\
	set_bit(bit, (unsigned long *)cpu_caps_set);	\
+11 −0
Original line number Diff line number Diff line
@@ -21,6 +21,11 @@
 * this feature bit is not displayed in /proc/cpuinfo at all.
 */

/*
 * When adding new features here that depend on other features,
 * please update the table in kernel/cpu/cpuid-deps.c
 */

/* Intel-defined CPU features, CPUID level 0x00000001 (edx), word 0 */
#define X86_FEATURE_FPU		( 0*32+ 0) /* Onboard FPU */
#define X86_FEATURE_VME		( 0*32+ 1) /* Virtual Mode Extensions */
@@ -294,6 +299,12 @@
#define X86_FEATURE_AVX512VBMI  (16*32+ 1) /* AVX512 Vector Bit Manipulation instructions*/
#define X86_FEATURE_PKU		(16*32+ 3) /* Protection Keys for Userspace */
#define X86_FEATURE_OSPKE	(16*32+ 4) /* OS Protection Keys Enable */
#define X86_FEATURE_AVX512_VBMI2 (16*32+ 6) /* Additional AVX512 Vector Bit Manipulation Instructions */
#define X86_FEATURE_GFNI	(16*32+ 8) /* Galois Field New Instructions */
#define X86_FEATURE_VAES	(16*32+ 9) /* Vector AES */
#define X86_FEATURE_VPCLMULQDQ	(16*32+ 10) /* Carry-Less Multiplication Double Quadword */
#define X86_FEATURE_AVX512_VNNI (16*32+ 11) /* Vector Neural Network Instructions */
#define X86_FEATURE_AVX512_BITALG (16*32+12) /* Support for VPOPCNT[B,W] and VPSHUF-BITQMB */
#define X86_FEATURE_AVX512_VPOPCNTDQ (16*32+14) /* POPCNT for vectors of DW/QW */
#define X86_FEATURE_LA57	(16*32+16) /* 5-level page tables */
#define X86_FEATURE_RDPID	(16*32+22) /* RDPID instruction */
+0 −10
Original line number Diff line number Diff line
@@ -33,11 +33,6 @@ DECLARE_EVENT_CLASS(x86_fpu,
	)
);

DEFINE_EVENT(x86_fpu, x86_fpu_state,
	TP_PROTO(struct fpu *fpu),
	TP_ARGS(fpu)
);

DEFINE_EVENT(x86_fpu, x86_fpu_before_save,
	TP_PROTO(struct fpu *fpu),
	TP_ARGS(fpu)
@@ -73,11 +68,6 @@ DEFINE_EVENT(x86_fpu, x86_fpu_activate_state,
	TP_ARGS(fpu)
);

DEFINE_EVENT(x86_fpu, x86_fpu_deactivate_state,
	TP_PROTO(struct fpu *fpu),
	TP_ARGS(fpu)
);

DEFINE_EVENT(x86_fpu, x86_fpu_init_state,
	TP_PROTO(struct fpu *fpu),
	TP_ARGS(fpu)
+1 −0
Original line number Diff line number Diff line
@@ -22,6 +22,7 @@ obj-y += rdrand.o
obj-y			+= match.o
obj-y			+= bugs.o
obj-$(CONFIG_CPU_FREQ)	+= aperfmperf.o
obj-y			+= cpuid-deps.o

obj-$(CONFIG_PROC_FS)	+= proc.o
obj-$(CONFIG_X86_FEATURE_NAMES) += capflags.o powerflags.o
+7 −9
Original line number Diff line number Diff line
@@ -1301,18 +1301,16 @@ void print_cpu_info(struct cpuinfo_x86 *c)
		pr_cont(")\n");
}

static __init int setup_disablecpuid(char *arg)
/*
 * clearcpuid= was already parsed in fpu__init_parse_early_param.
 * But we need to keep a dummy __setup around otherwise it would
 * show up as an environment variable for init.
 */
static __init int setup_clearcpuid(char *arg)
{
	int bit;

	if (get_option(&arg, &bit) && bit >= 0 && bit < NCAPINTS * 32)
		setup_clear_cpu_cap(bit);
	else
		return 0;

	return 1;
}
__setup("clearcpuid=", setup_disablecpuid);
__setup("clearcpuid=", setup_clearcpuid);

#ifdef CONFIG_X86_64
DEFINE_PER_CPU_FIRST(union irq_stack_union,
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