Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 4f3f9008 authored by Bin Meng's avatar Bin Meng Committed by Paul Walmsley
Browse files

riscv: Using CSR numbers to access CSRs 



Since commit a3182c91 ("RISC-V: Access CSRs using CSR numbers"),
we should prefer accessing CSRs using their CSR numbers, but there
are several leftovers like sstatus / sptbr we missed.

Signed-off-by: default avatarBin Meng <bmeng.cn@gmail.com>
Reviewed-by: default avatarAnup Patel <anup@brainfault.org>
Reviewed-by: default avatarChristoph Hellwig <hch@lst.de>
Signed-off-by: default avatarPaul Walmsley <paul.walmsley@sifive.com>
parent 015b2693

arch/riscv/kernel/entry.S

+3 −3
Original line number Diff line number Diff line
@@ -167,7 +167,7 @@ ENTRY(handle_exception) 
	tail do_IRQ

1:

	/* Exceptions run with interrupts enabled */

	csrs sstatus, SR_SIE

	csrs CSR_SSTATUS, SR_SIE



	/* Handle syscalls */

	li t0, EXC_SYSCALL
@@ -222,7 +222,7 @@ ret_from_syscall: 


ret_from_exception:

	REG_L s0, PT_SSTATUS(sp)

	csrc sstatus, SR_SIE

	csrc CSR_SSTATUS, SR_SIE

	andi s0, s0, SR_SPP

	bnez s0, resume_kernel
@@ -265,7 +265,7 @@ work_pending: 
	bnez s1, work_resched

work_notifysig:

	/* Handle pending signals and notify-resume requests */

	csrs sstatus, SR_SIE /* Enable interrupts for do_notify_resume() */

	csrs CSR_SSTATUS, SR_SIE /* Enable interrupts for do_notify_resume() */

	move a0, sp /* pt_regs */

	move a1, s0 /* current_thread_info->flags */

	tail do_notify_resume

arch/riscv/kernel/fpu.S

+4 −4
Original line number Diff line number Diff line
@@ -23,7 +23,7 @@ ENTRY(__fstate_save) 
	li  a2,  TASK_THREAD_F0

	add a0, a0, a2

	li t1, SR_FS

	csrs sstatus, t1

	csrs CSR_SSTATUS, t1

	frcsr t0

	fsd f0,  TASK_THREAD_F0_F0(a0)

	fsd f1,  TASK_THREAD_F1_F0(a0)
@@ -58,7 +58,7 @@ ENTRY(__fstate_save) 
	fsd f30, TASK_THREAD_F30_F0(a0)

	fsd f31, TASK_THREAD_F31_F0(a0)

	sw t0, TASK_THREAD_FCSR_F0(a0)

	csrc sstatus, t1

	csrc CSR_SSTATUS, t1

	ret

ENDPROC(__fstate_save)
@@ -67,7 +67,7 @@ ENTRY(__fstate_restore) 
	add a0, a0, a2

	li t1, SR_FS

	lw t0, TASK_THREAD_FCSR_F0(a0)

	csrs sstatus, t1

	csrs CSR_SSTATUS, t1

	fld f0,  TASK_THREAD_F0_F0(a0)

	fld f1,  TASK_THREAD_F1_F0(a0)

	fld f2,  TASK_THREAD_F2_F0(a0)
@@ -101,6 +101,6 @@ ENTRY(__fstate_restore) 
	fld f30, TASK_THREAD_F30_F0(a0)

	fld f31, TASK_THREAD_F31_F0(a0)

	fscsr t0

	csrc sstatus, t1

	csrc CSR_SSTATUS, t1

	ret

ENDPROC(__fstate_restore)

arch/riscv/kernel/head.S

+1 −1
Original line number Diff line number Diff line
@@ -61,7 +61,7 @@ _start_kernel: 
	 * floating point in kernel space

	 */

	li t0, SR_FS

	csrc sstatus, t0

	csrc CSR_SSTATUS, t0



	/* Pick one hart to run the main boot sequence */

	la a3, hart_lottery

arch/riscv/lib/uaccess.S

+6 −6
Original line number Diff line number Diff line
@@ -18,7 +18,7 @@ ENTRY(__asm_copy_from_user) 


	/* Enable access to user memory */

	li t6, SR_SUM

	csrs sstatus, t6

	csrs CSR_SSTATUS, t6



	add a3, a1, a2

	/* Use word-oriented copy only if low-order bits match */
@@ -47,7 +47,7 @@ ENTRY(__asm_copy_from_user) 


3:

	/* Disable access to user memory */

	csrc sstatus, t6

	csrc CSR_SSTATUS, t6

	li a0, 0

	ret

4: /* Edge case: unalignment */
@@ -72,7 +72,7 @@ ENTRY(__clear_user) 


	/* Enable access to user memory */

	li t6, SR_SUM

	csrs sstatus, t6

	csrs CSR_SSTATUS, t6



	add a3, a0, a1

	addi t0, a0, SZREG-1
@@ -94,7 +94,7 @@ ENTRY(__clear_user) 


3:

	/* Disable access to user memory */

	csrc sstatus, t6

	csrc CSR_SSTATUS, t6

	li a0, 0

	ret

4: /* Edge case: unalignment */
@@ -114,11 +114,11 @@ ENDPROC(__clear_user) 
	/* Fixup code for __copy_user(10) and __clear_user(11) */

10:

	/* Disable access to user memory */

	csrs sstatus, t6

	csrs CSR_SSTATUS, t6

	mv a0, a2

	ret

11:

	csrs sstatus, t6

	csrs CSR_SSTATUS, t6

	mv a0, a1

	ret

	.previous

arch/riscv/mm/context.c

+1 −6
Original line number Diff line number Diff line
@@ -57,12 +57,7 @@ void switch_mm(struct mm_struct *prev, struct mm_struct *next, 
	cpumask_clear_cpu(cpu, mm_cpumask(prev));

	cpumask_set_cpu(cpu, mm_cpumask(next));



	/*

	 * Use the old spbtr name instead of using the current satp

	 * name to support binutils 2.29 which doesn't know about the

	 * privileged ISA 1.10 yet.

	 */

	csr_write(sptbr, virt_to_pfn(next->pgd) | SATP_MODE);

	csr_write(CSR_SATP, virt_to_pfn(next->pgd) | SATP_MODE);

	local_flush_tlb_all();



	flush_icache_deferred(next);