Loading arch/arm/boot/dts/am33xx-l4.dtsi +6 −8 Original line number Diff line number Diff line Loading @@ -1759,11 +1759,10 @@ target-module@cc000 { /* 0x481cc000, ap 60 46.0 */ compatible = "ti,sysc-omap4", "ti,sysc"; ti,hwmods = "d_can0"; reg = <0xcc000 0x4>; reg-names = "rev"; /* Domains (P, C): per_pwrdm, l4ls_clkdm */ clocks = <&l4ls_clkctrl AM3_L4LS_D_CAN0_CLKCTRL 0>; clock-names = "fck"; clocks = <&l4ls_clkctrl AM3_L4LS_D_CAN0_CLKCTRL 0>, <&dcan0_fck>; clock-names = "fck", "osc"; #address-cells = <1>; #size-cells = <1>; ranges = <0x0 0xcc000 0x2000>; Loading @@ -1782,11 +1781,10 @@ target-module@d0000 { /* 0x481d0000, ap 62 42.0 */ compatible = "ti,sysc-omap4", "ti,sysc"; ti,hwmods = "d_can1"; reg = <0xd0000 0x4>; reg-names = "rev"; /* Domains (P, C): per_pwrdm, l4ls_clkdm */ clocks = <&l4ls_clkctrl AM3_L4LS_D_CAN1_CLKCTRL 0>; clock-names = "fck"; clocks = <&l4ls_clkctrl AM3_L4LS_D_CAN1_CLKCTRL 0>, <&dcan1_fck>; clock-names = "fck", "osc"; #address-cells = <1>; #size-cells = <1>; ranges = <0x0 0xd0000 0x2000>; Loading arch/arm/boot/dts/am437x-l4.dtsi +0 −4 Original line number Diff line number Diff line Loading @@ -1575,8 +1575,6 @@ target-module@cc000 { /* 0x481cc000, ap 50 46.0 */ compatible = "ti,sysc-omap4", "ti,sysc"; ti,hwmods = "d_can0"; reg = <0xcc000 0x4>; reg-names = "rev"; /* Domains (P, C): per_pwrdm, l4ls_clkdm */ clocks = <&l4ls_clkctrl AM4_L4LS_D_CAN0_CLKCTRL 0>; clock-names = "fck"; Loading @@ -1596,8 +1594,6 @@ target-module@d0000 { /* 0x481d0000, ap 52 3a.0 */ compatible = "ti,sysc-omap4", "ti,sysc"; ti,hwmods = "d_can1"; reg = <0xd0000 0x4>; reg-names = "rev"; /* Domains (P, C): per_pwrdm, l4ls_clkdm */ clocks = <&l4ls_clkctrl AM4_L4LS_D_CAN1_CLKCTRL 0>; clock-names = "fck"; Loading drivers/bus/ti-sysc.c +11 −12 Original line number Diff line number Diff line Loading @@ -660,12 +660,6 @@ static int sysc_check_registers(struct sysc *ddata) nr_regs++; } if (nr_regs < 1) { dev_err(ddata->dev, "missing registers\n"); return -EINVAL; } if (nr_matches > nr_regs) { dev_err(ddata->dev, "overlapping registers: (%i/%i)", nr_regs, nr_matches); Loading @@ -691,12 +685,18 @@ static int sysc_ioremap(struct sysc *ddata) { int size; if (ddata->offsets[SYSC_REVISION] < 0 && ddata->offsets[SYSC_SYSCONFIG] < 0 && ddata->offsets[SYSC_SYSSTATUS] < 0) { size = ddata->module_size; } else { size = max3(ddata->offsets[SYSC_REVISION], ddata->offsets[SYSC_SYSCONFIG], ddata->offsets[SYSC_SYSSTATUS]); if (size < 0 || (size + sizeof(u32)) > ddata->module_size) if ((size + sizeof(u32)) > ddata->module_size) return -EINVAL; } ddata->module_va = devm_ioremap(ddata->dev, ddata->module_pa, Loading Loading @@ -1128,7 +1128,6 @@ static const struct sysc_revision_quirk sysc_revision_quirks[] = { SYSC_QUIRK("cpgmac", 0, 0x1200, 0x1208, 0x1204, 0x4edb1902, 0xffff00f0, 0), SYSC_QUIRK("dcan", 0, 0, -1, -1, 0xffffffff, 0xffffffff, 0), SYSC_QUIRK("dcan", 0, 0, -1, -1, 0x00001401, 0xffffffff, 0), SYSC_QUIRK("dmic", 0, 0, 0x10, -1, 0x50010000, 0xffffffff, 0), SYSC_QUIRK("dwc3", 0, 0, 0x10, -1, 0x500a0200, 0xffffffff, 0), SYSC_QUIRK("epwmss", 0, 0, 0x4, -1, 0x47400001, 0xffffffff, 0), Loading Loading
arch/arm/boot/dts/am33xx-l4.dtsi +6 −8 Original line number Diff line number Diff line Loading @@ -1759,11 +1759,10 @@ target-module@cc000 { /* 0x481cc000, ap 60 46.0 */ compatible = "ti,sysc-omap4", "ti,sysc"; ti,hwmods = "d_can0"; reg = <0xcc000 0x4>; reg-names = "rev"; /* Domains (P, C): per_pwrdm, l4ls_clkdm */ clocks = <&l4ls_clkctrl AM3_L4LS_D_CAN0_CLKCTRL 0>; clock-names = "fck"; clocks = <&l4ls_clkctrl AM3_L4LS_D_CAN0_CLKCTRL 0>, <&dcan0_fck>; clock-names = "fck", "osc"; #address-cells = <1>; #size-cells = <1>; ranges = <0x0 0xcc000 0x2000>; Loading @@ -1782,11 +1781,10 @@ target-module@d0000 { /* 0x481d0000, ap 62 42.0 */ compatible = "ti,sysc-omap4", "ti,sysc"; ti,hwmods = "d_can1"; reg = <0xd0000 0x4>; reg-names = "rev"; /* Domains (P, C): per_pwrdm, l4ls_clkdm */ clocks = <&l4ls_clkctrl AM3_L4LS_D_CAN1_CLKCTRL 0>; clock-names = "fck"; clocks = <&l4ls_clkctrl AM3_L4LS_D_CAN1_CLKCTRL 0>, <&dcan1_fck>; clock-names = "fck", "osc"; #address-cells = <1>; #size-cells = <1>; ranges = <0x0 0xd0000 0x2000>; Loading
arch/arm/boot/dts/am437x-l4.dtsi +0 −4 Original line number Diff line number Diff line Loading @@ -1575,8 +1575,6 @@ target-module@cc000 { /* 0x481cc000, ap 50 46.0 */ compatible = "ti,sysc-omap4", "ti,sysc"; ti,hwmods = "d_can0"; reg = <0xcc000 0x4>; reg-names = "rev"; /* Domains (P, C): per_pwrdm, l4ls_clkdm */ clocks = <&l4ls_clkctrl AM4_L4LS_D_CAN0_CLKCTRL 0>; clock-names = "fck"; Loading @@ -1596,8 +1594,6 @@ target-module@d0000 { /* 0x481d0000, ap 52 3a.0 */ compatible = "ti,sysc-omap4", "ti,sysc"; ti,hwmods = "d_can1"; reg = <0xd0000 0x4>; reg-names = "rev"; /* Domains (P, C): per_pwrdm, l4ls_clkdm */ clocks = <&l4ls_clkctrl AM4_L4LS_D_CAN1_CLKCTRL 0>; clock-names = "fck"; Loading
drivers/bus/ti-sysc.c +11 −12 Original line number Diff line number Diff line Loading @@ -660,12 +660,6 @@ static int sysc_check_registers(struct sysc *ddata) nr_regs++; } if (nr_regs < 1) { dev_err(ddata->dev, "missing registers\n"); return -EINVAL; } if (nr_matches > nr_regs) { dev_err(ddata->dev, "overlapping registers: (%i/%i)", nr_regs, nr_matches); Loading @@ -691,12 +685,18 @@ static int sysc_ioremap(struct sysc *ddata) { int size; if (ddata->offsets[SYSC_REVISION] < 0 && ddata->offsets[SYSC_SYSCONFIG] < 0 && ddata->offsets[SYSC_SYSSTATUS] < 0) { size = ddata->module_size; } else { size = max3(ddata->offsets[SYSC_REVISION], ddata->offsets[SYSC_SYSCONFIG], ddata->offsets[SYSC_SYSSTATUS]); if (size < 0 || (size + sizeof(u32)) > ddata->module_size) if ((size + sizeof(u32)) > ddata->module_size) return -EINVAL; } ddata->module_va = devm_ioremap(ddata->dev, ddata->module_pa, Loading Loading @@ -1128,7 +1128,6 @@ static const struct sysc_revision_quirk sysc_revision_quirks[] = { SYSC_QUIRK("cpgmac", 0, 0x1200, 0x1208, 0x1204, 0x4edb1902, 0xffff00f0, 0), SYSC_QUIRK("dcan", 0, 0, -1, -1, 0xffffffff, 0xffffffff, 0), SYSC_QUIRK("dcan", 0, 0, -1, -1, 0x00001401, 0xffffffff, 0), SYSC_QUIRK("dmic", 0, 0, 0x10, -1, 0x50010000, 0xffffffff, 0), SYSC_QUIRK("dwc3", 0, 0, 0x10, -1, 0x500a0200, 0xffffffff, 0), SYSC_QUIRK("epwmss", 0, 0, 0x4, -1, 0x47400001, 0xffffffff, 0), Loading