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Commit 4ea65534 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'mips_fixes_5.4_1' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux 

Pull MIPS fixes from Paul Burton:

 - Build fixes for Cavium Octeon & PMC-Sierra MSP systems, as well as
   all pre-MIPSr6 configurations built with binutils < 2.25.

 - Boot fixes for 64-bit Loongson systems & SGI IP28 systems.

 - Wire up the new clone3 syscall.

 - Clean ups for a few build-time warnings.

* tag 'mips_fixes_5.4_1' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux:
  MIPS: fw/arc: Remove unused addr variable
  MIPS: pmcs-msp71xx: Remove unused addr variable
  MIPS: pmcs-msp71xx: Add missing MAX_PROM_MEM definition
  mips: Loongson: Fix the link time qualifier of 'serial_exit()'
  MIPS: init: Prevent adding memory before PHYS_OFFSET
  MIPS: init: Fix reservation of memory between PHYS_OFFSET and mem start
  MIPS: VDSO: Fix build for binutils < 2.25
  MIPS: VDSO: Remove unused gettimeofday.c
  MIPS: Wire up clone3 syscall
  MIPS: octeon: Include required header; fix octeon ethernet build
  MIPS: cpu-bugs64: Mark inline functions as __always_inline
  MIPS: dts: ar9331: fix interrupt-controller size
  MIPS: Loongson64: Fix boot failure after dropping boot_mem_map
parents 812ad49d 6822c29d

arch/mips/boot/dts/qca/ar9331.dtsi

+1 −1
Original line number Diff line number Diff line
@@ -99,7 +99,7 @@ 


			miscintc: interrupt-controller@18060010 {

				compatible = "qca,ar7240-misc-intc";

				reg = <0x18060010 0x4>;

				reg = <0x18060010 0x8>;



				interrupt-parent = <&cpuintc>;

				interrupts = <6>;

arch/mips/fw/arc/memory.c

+0 −1
Original line number Diff line number Diff line
@@ -160,7 +160,6 @@ void __init prom_meminit(void) 


void __init prom_free_prom_memory(void)

{

	unsigned long addr;

	int i;



	if (prom_flags & PROM_FLAG_DONT_FREE_TEMP)

arch/mips/include/asm/octeon/cvmx-ipd.h

+1 −0
Original line number Diff line number Diff line
@@ -36,6 +36,7 @@ 
#include <asm/octeon/octeon-feature.h>



#include <asm/octeon/cvmx-ipd-defs.h>

#include <asm/octeon/cvmx-pip-defs.h>



enum cvmx_ipd_mode {

   CVMX_IPD_OPC_MODE_STT = 0LL,	  /* All blocks DRAM, not cached in L2 */

arch/mips/include/asm/unistd.h

+1 −0
Original line number Diff line number Diff line
@@ -52,6 +52,7 @@ 
# endif

#define __ARCH_WANT_SYS_FORK

#define __ARCH_WANT_SYS_CLONE

#define __ARCH_WANT_SYS_CLONE3



/* whitelists for checksyscalls */

#define __IGNORE_fadvise64_64

arch/mips/kernel/cpu-bugs64.c

+8 −6
Original line number Diff line number Diff line
@@ -24,7 +24,8 @@ static char r4kwar[] __initdata = 
static char daddiwar[] __initdata =

	"Enable CPU_DADDI_WORKAROUNDS to rectify.";



static inline void align_mod(const int align, const int mod)

static __always_inline __init

void align_mod(const int align, const int mod)

{

	asm volatile(

		".set	push\n\t"
@@ -38,7 +39,8 @@ static inline void align_mod(const int align, const int mod) 
		: "n"(align), "n"(mod));

}



static __always_inline void mult_sh_align_mod(long *v1, long *v2, long *w,

static __always_inline __init

void mult_sh_align_mod(long *v1, long *v2, long *w,

		       const int align, const int mod)

{

	unsigned long flags;
@@ -113,7 +115,7 @@ static __always_inline void mult_sh_align_mod(long *v1, long *v2, long *w, 
	*w = lw;

}



static inline void check_mult_sh(void)

static __always_inline __init void check_mult_sh(void)

{

	long v1[8], v2[8], w[8];

	int bug, fix, i;
@@ -176,7 +178,7 @@ asmlinkage void __init do_daddi_ov(struct pt_regs *regs) 
	exception_exit(prev_state);

}



static inline void check_daddi(void)

static __init void check_daddi(void)

{

	extern asmlinkage void handle_daddi_ov(void);

	unsigned long flags;
@@ -242,7 +244,7 @@ static inline void check_daddi(void) 


int daddiu_bug	= IS_ENABLED(CONFIG_CPU_MIPSR6) ? 0 : -1;



static inline void check_daddiu(void)

static __init void check_daddiu(void)

{

	long v, w, tmp;