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Commit 4dfdd0ee authored by Josip Pavic's avatar Josip Pavic Committed by Alex Deucher
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drm/amd/display: send pipe set command to dmcu when stream unblanks 



[Why]
When stream is blanked, pipe set command is sent to dmcu to notify it
that the abm pipe is disabled. When stream is unblanked, no notification is
made to dmcu that the abm pipe has been enabled, resulting in abm not
being enabled in the firmware.

[How]
When stream is unblanked, send a pipe set command to dmcu.

Signed-off-by: default avatarJosip Pavic <Josip.Pavic@amd.com>
Reviewed-by: default avatarAnthony Koo <Anthony.Koo@amd.com>
Acked-by: default avatarLeo Li <sunpeng.li@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent a4a3ad35

drivers/gpu/drm/amd/display/dc/dce/dce_abm.c

+17 −15
Original line number Diff line number Diff line
@@ -175,7 +175,6 @@ static void dmcu_set_backlight_level( 
	uint32_t controller_id)

{

	unsigned int backlight_8_bit = 0;

	uint32_t rampingBoundary = 0xFFFF;

	uint32_t s2;



	if (backlight_pwm_u16_16 & 0x10000)
@@ -185,17 +184,6 @@ static void dmcu_set_backlight_level( 
		// Take MSB of fractional part since backlight is not max

		backlight_8_bit = (backlight_pwm_u16_16 >> 8) & 0xFF;



	/* set ramping boundary */

	REG_WRITE(MASTER_COMM_DATA_REG1, rampingBoundary);



	/* setDMCUParam_Pipe */

	REG_UPDATE_2(MASTER_COMM_CMD_REG,

			MASTER_COMM_CMD_REG_BYTE0, MCP_ABM_PIPE_SET,

			MASTER_COMM_CMD_REG_BYTE1, controller_id);



	/* notifyDMCUMsg */

	REG_UPDATE(MASTER_COMM_CNTL_REG, MASTER_COMM_INTERRUPT, 1);



	/* waitDMCUReadyForCmd */

	REG_WAIT(MASTER_COMM_CNTL_REG, MASTER_COMM_INTERRUPT,

			0, 1, 80000);
@@ -305,21 +293,34 @@ static bool dce_abm_set_level(struct abm *abm, uint32_t level) 
	return true;

}



static bool dce_abm_immediate_disable(struct abm *abm)

static bool dce_abm_set_pipe(struct abm *abm, uint32_t controller_id)

{

	struct dce_abm *abm_dce = TO_DCE_ABM(abm);

	uint32_t rampingBoundary = 0xFFFF;



	REG_WAIT(MASTER_COMM_CNTL_REG, MASTER_COMM_INTERRUPT, 0,

			1, 80000);



	/* setDMCUParam_ABMLevel */

	/* set ramping boundary */

	REG_WRITE(MASTER_COMM_DATA_REG1, rampingBoundary);



	/* setDMCUParam_Pipe */

	REG_UPDATE_2(MASTER_COMM_CMD_REG,

			MASTER_COMM_CMD_REG_BYTE0, MCP_ABM_PIPE_SET,

			MASTER_COMM_CMD_REG_BYTE1, MCP_DISABLE_ABM_IMMEDIATELY);

			MASTER_COMM_CMD_REG_BYTE1, controller_id);



	/* notifyDMCUMsg */

	REG_UPDATE(MASTER_COMM_CNTL_REG, MASTER_COMM_INTERRUPT, 1);



	return true;

}



static bool dce_abm_immediate_disable(struct abm *abm)

{

	struct dce_abm *abm_dce = TO_DCE_ABM(abm);



	dce_abm_set_pipe(abm, MCP_DISABLE_ABM_IMMEDIATELY);



	abm->stored_backlight_registers.BL_PWM_CNTL =

		REG_READ(BL_PWM_CNTL);

	abm->stored_backlight_registers.BL_PWM_CNTL2 =
@@ -419,6 +420,7 @@ static const struct abm_funcs dce_funcs = { 
	.abm_init = dce_abm_init,

	.set_abm_level = dce_abm_set_level,

	.init_backlight = dce_abm_init_backlight,

	.set_pipe = dce_abm_set_pipe,

	.set_backlight_level_pwm = dce_abm_set_backlight_level_pwm,

	.get_current_backlight = dce_abm_get_current_backlight,

	.get_target_backlight = dce_abm_get_target_backlight,

drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

+3 −1
Original line number Diff line number Diff line
@@ -2162,8 +2162,10 @@ static void dcn10_blank_pixel_data( 
	if (!blank) {

		if (stream_res->tg->funcs->set_blank)

			stream_res->tg->funcs->set_blank(stream_res->tg, blank);

		if (stream_res->abm)

		if (stream_res->abm) {

			stream_res->abm->funcs->set_pipe(stream_res->abm, stream_res->tg->inst + 1);

			stream_res->abm->funcs->set_abm_level(stream_res->abm, stream->abm_level);

		}

	} else if (blank) {

		if (stream_res->abm)

			stream_res->abm->funcs->set_abm_immediate_disable(stream_res->abm);

drivers/gpu/drm/amd/display/dc/inc/hw/abm.h

+1 −0
Original line number Diff line number Diff line
@@ -46,6 +46,7 @@ struct abm_funcs { 
	void (*abm_init)(struct abm *abm);

	bool (*set_abm_level)(struct abm *abm, unsigned int abm_level);

	bool (*set_abm_immediate_disable)(struct abm *abm);

	bool (*set_pipe)(struct abm *abm, unsigned int controller_id);

	bool (*init_backlight)(struct abm *abm);



	/* backlight_pwm_u16_16 is unsigned 32 bit,