Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 4dfc6f8b authored by Simon Horman's avatar Simon Horman
Browse files

ARM: dts: r8a7793: add DVC support to device tree 



Add DVC support to sound node in r8a7793 device tree.

Based on similar work for the r8a7791 by Kuninori Morimoto.

Cc: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: default avatarSimon Horman <horms+renesas@verge.net.au>
parent 951431e0

arch/arm/boot/dts/r8a7793.dtsi

+6 −0
Original line number Original line Diff line number Diff line
@@ -1127,17 +1127,23 @@ 
			<&mstp10_clks R8A7793_CLK_SCU_SRC5>, <&mstp10_clks R8A7793_CLK_SCU_SRC4>,

			<&mstp10_clks R8A7793_CLK_SCU_SRC5>, <&mstp10_clks R8A7793_CLK_SCU_SRC4>,

			<&mstp10_clks R8A7793_CLK_SCU_SRC3>, <&mstp10_clks R8A7793_CLK_SCU_SRC2>,

			<&mstp10_clks R8A7793_CLK_SCU_SRC3>, <&mstp10_clks R8A7793_CLK_SCU_SRC2>,

			<&mstp10_clks R8A7793_CLK_SCU_SRC1>, <&mstp10_clks R8A7793_CLK_SCU_SRC0>,

			<&mstp10_clks R8A7793_CLK_SCU_SRC1>, <&mstp10_clks R8A7793_CLK_SCU_SRC0>,

			<&mstp10_clks R8A7793_CLK_SCU_DVC0>, <&mstp10_clks R8A7793_CLK_SCU_DVC1>,

			<&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>, <&m2_clk>;

			<&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>, <&m2_clk>;

		clock-names = "ssi-all",

		clock-names = "ssi-all",

				"ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",

				"ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",

				"ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0",

				"ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0",

				"src.9", "src.8", "src.7", "src.6", "src.5",

				"src.9", "src.8", "src.7", "src.6", "src.5",

				"src.4", "src.3", "src.2", "src.1", "src.0",

				"src.4", "src.3", "src.2", "src.1", "src.0",

				"dvc.0", "dvc.1",

				"clk_a", "clk_b", "clk_c", "clk_i";

				"clk_a", "clk_b", "clk_c", "clk_i";

		power-domains = <&cpg_clocks>;

		power-domains = <&cpg_clocks>;





		status = "disabled";

		status = "disabled";





		rcar_sound,dvc {

			dvc0: dvc@0 { };

			dvc1: dvc@1 { };

		};

		rcar_sound,src {

		rcar_sound,src {

			src0: src@0 { };

			src0: src@0 { };

			src1: src@1 { };

			src1: src@1 { };