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Commit 4de97b0c authored by David S. Miller's avatar David S. Miller
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Merge branch 'enetc-PCIe-MDIO'



Claudiu Manoil says:

====================
enetc: Add mdio bus driver for the PCIe MDIO endpoint

First patch fixes a sparse issue and cleans up accessors to avoid
casting to __iomem.  The second one cleans up the Makefile, to make
it easier to add new entries.

Third patch just registers the PCIe endpoint device containing
the MDIO registers as a standalone MDIO bus driver, to provide
an alternative way to control the MDIO bus.  The same code used
by the ENETC ports (eth controllers) to manage MDIO via local
registers applies and is reused.

Bindings are provided for the new MDIO node, similarly to ENETC
port nodes bindings.

Last patch enables the ENETC port 1 and its RGMII PHY on the
LS1028A QDS board, where the MDIO muxing configuration relies
on the MDIO support provided in the first patch.

Changes since v0:
v1 - fixed mdio bus allocation
v2 - cleaned up accessors to avoid casting
v3 - fixed spelling (mostly commit message)
v4 - fixed err path check blunder
v5 - fixed loadble module build, provided separate kbuild module
     for the driver
====================

Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents 4a986617 8488d8e9
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+39 −3
Original line number Diff line number Diff line
@@ -11,7 +11,9 @@ Required properties:
		  to parent node bindings.
- compatible	: Should be "fsl,enetc".

1) The ENETC external port is connected to a MDIO configurable phy:
1. The ENETC external port is connected to a MDIO configurable phy

1.1. Using the local ENETC Port MDIO interface

In this case, the ENETC node should include a "mdio" sub-node
that in turn should contain the "ethernet-phy" node describing the
@@ -47,8 +49,42 @@ Example:
		};
	};

2) The ENETC port is an internal port or has a fixed-link external
connection:
1.2. Using the central MDIO PCIe endpoint device

In this case, the mdio node should be defined as another PCIe
endpoint node, at the same level with the ENETC port nodes.

Required properties:

- reg		: Specifies PCIe Device Number and Function
		  Number of the ENETC endpoint device, according
		  to parent node bindings.
- compatible	: Should be "fsl,enetc-mdio".

The remaining required mdio bus properties are standard, their bindings
already defined in Documentation/devicetree/bindings/net/mdio.txt.

Example:

	ethernet@0,0 {
		compatible = "fsl,enetc";
		reg = <0x000000 0 0 0 0>;
		phy-handle = <&sgmii_phy0>;
		phy-connection-type = "sgmii";
	};

	mdio@0,3 {
		compatible = "fsl,enetc-mdio";
		reg = <0x000300 0 0 0 0>;
		#address-cells = <1>;
		#size-cells = <0>;
		sgmii_phy0: ethernet-phy@2 {
			reg = <0x2>;
		};
	};

2. The ENETC port is an internal port or has a fixed-link external
connection

In this case, the ENETC port node defines a fixed link connection,
as specified by Documentation/devicetree/bindings/net/fixed-link.txt.
+40 −0
Original line number Diff line number Diff line
@@ -85,6 +85,26 @@
			system-clock-frequency = <25000000>;
		};
	};

	mdio-mux {
		compatible = "mdio-mux-multiplexer";
		mux-controls = <&mux 0>;
		mdio-parent-bus = <&enetc_mdio_pf3>;
		#address-cells=<1>;
		#size-cells = <0>;

		/* on-board RGMII PHY */
		mdio@0 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0>;

			qds_phy1: ethernet-phy@5 {
				/* Atheros 8035 */
				reg = <5>;
			};
		};
	};
};

&duart0 {
@@ -164,6 +184,26 @@
			};
		};
	};

	fpga@66 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "fsl,ls1028aqds-fpga", "fsl,fpga-qixis-i2c",
			     "simple-mfd";
		reg = <0x66>;

		mux: mux-controller {
			compatible = "reg-mux";
			#mux-control-cells = <1>;
			mux-reg-masks = <0x54 0xf0>; /* 0: reg 0x54, bits 7:4 */
		};
	};

};

&enetc_port1 {
	phy-handle = <&qds_phy1>;
	phy-connection-type = "rgmii-id";
};

&sai1 {
+6 −0
Original line number Diff line number Diff line
@@ -536,6 +536,12 @@
				compatible = "fsl,enetc";
				reg = <0x000100 0 0 0 0>;
			};
			enetc_mdio_pf3: mdio@0,3 {
				compatible = "fsl,enetc-mdio";
				reg = <0x000300 0 0 0 0>;
				#address-cells = <1>;
				#size-cells = <0>;
			};
			ethernet@0,4 {
				compatible = "fsl,enetc-ptp";
				reg = <0x000400 0 0 0 0>;
+9 −0
Original line number Diff line number Diff line
@@ -18,6 +18,15 @@ config FSL_ENETC_VF

	  If compiled as module (M), the module name is fsl-enetc-vf.

config FSL_ENETC_MDIO
	tristate "ENETC MDIO driver"
	depends on PCI && (ARCH_LAYERSCAPE || COMPILE_TEST)
	help
	  This driver supports NXP ENETC Central MDIO controller as a PCIe
	  physical function (PF) device.

	  If compiled as module (M), the module name is fsl-enetc-mdio.

config FSL_ENETC_PTP_CLOCK
	tristate "ENETC PTP clock driver"
	depends on PTP_1588_CLOCK_QORIQ && (FSL_ENETC || FSL_ENETC_VF)
+8 −11
Original line number Diff line number Diff line
# SPDX-License-Identifier: GPL-2.0

common-objs := enetc.o enetc_cbdr.o enetc_ethtool.o

obj-$(CONFIG_FSL_ENETC) += fsl-enetc.o
fsl-enetc-$(CONFIG_FSL_ENETC) += enetc.o enetc_cbdr.o enetc_ethtool.o \
				 enetc_mdio.o
fsl-enetc-y := enetc_pf.o enetc_mdio.o $(common-objs)
fsl-enetc-$(CONFIG_PCI_IOV) += enetc_msg.o
fsl-enetc-objs := enetc_pf.o $(fsl-enetc-y)

obj-$(CONFIG_FSL_ENETC_VF) += fsl-enetc-vf.o
fsl-enetc-vf-y := enetc_vf.o $(common-objs)

ifeq ($(CONFIG_FSL_ENETC)$(CONFIG_FSL_ENETC_VF), yy)
fsl-enetc-vf-objs := enetc_vf.o
else
fsl-enetc-vf-$(CONFIG_FSL_ENETC_VF) += enetc.o enetc_cbdr.o \
				       enetc_ethtool.o
fsl-enetc-vf-objs := enetc_vf.o $(fsl-enetc-vf-y)
endif
obj-$(CONFIG_FSL_ENETC_MDIO) += fsl-enetc-mdio.o
fsl-enetc-mdio-y := enetc_pci_mdio.o enetc_mdio.o

obj-$(CONFIG_FSL_ENETC_PTP_CLOCK) += fsl-enetc-ptp.o
fsl-enetc-ptp-$(CONFIG_FSL_ENETC_PTP_CLOCK) += enetc_ptp.o
fsl-enetc-ptp-y := enetc_ptp.o
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