Loading qcom/shima-qupv3.dtsi +3 −2 Original line number Diff line number Diff line Loading @@ -59,6 +59,7 @@ qcom,ev-factor = <2>; qcom,iommu-dma-addr-pool = <0x100000 0x100000>; qcom,gpi-ee-offset = <0x10000>; qcom,le-vm; status = "ok"; }; Loading Loading @@ -197,8 +198,8 @@ pinctrl-names = "default", "sleep"; pinctrl-0 = <&qupv3_se10_spi_active>; pinctrl-1 = <&qupv3_se10_spi_sleep>; dmas = <&gpi_dma0 0 2 1 64 0>, <&gpi_dma0 1 2 1 64 0>; dmas = <&gpi_dma0 0 2 1 64 2>, <&gpi_dma0 1 2 1 64 2>; dma-names = "tx", "rx"; spi-max-frequency = <50000000>; qcom,wrapper-core = <&qupv3_0>; Loading qcom/shima-vm.dtsi +18 −0 Original line number Diff line number Diff line Loading @@ -246,6 +246,7 @@ qupv3_0: qcom,qupv3_0_geni_se@9c0000 { compatible = "qcom,qupv3-geni-se"; reg = <0x9c0000 0x2000>; status = "ok"; }; /* GPI Instance */ Loading Loading @@ -298,6 +299,23 @@ }; }; /* SPI SE */ qupv3_se10_spi: spi@988000 { compatible = "qcom,spi-geni"; reg = <0x988000 0x4000>; reg-names = "se_phys"; #address-cells = <1>; #size-cells = <0>; dmas = <&gpi_dma0 0 2 1 64 0>, <&gpi_dma0 1 2 1 64 0>; dma-names = "tx", "rx"; spi-max-frequency = <50000000>; qcom,wrapper-core = <&qupv3_0>; qcom,le-vm; status = "disabled"; }; }; #include "lahaina-vm-ion.dtsi" #include "display/trustedvm-shima-sde.dtsi" Loading Loading
qcom/shima-qupv3.dtsi +3 −2 Original line number Diff line number Diff line Loading @@ -59,6 +59,7 @@ qcom,ev-factor = <2>; qcom,iommu-dma-addr-pool = <0x100000 0x100000>; qcom,gpi-ee-offset = <0x10000>; qcom,le-vm; status = "ok"; }; Loading Loading @@ -197,8 +198,8 @@ pinctrl-names = "default", "sleep"; pinctrl-0 = <&qupv3_se10_spi_active>; pinctrl-1 = <&qupv3_se10_spi_sleep>; dmas = <&gpi_dma0 0 2 1 64 0>, <&gpi_dma0 1 2 1 64 0>; dmas = <&gpi_dma0 0 2 1 64 2>, <&gpi_dma0 1 2 1 64 2>; dma-names = "tx", "rx"; spi-max-frequency = <50000000>; qcom,wrapper-core = <&qupv3_0>; Loading
qcom/shima-vm.dtsi +18 −0 Original line number Diff line number Diff line Loading @@ -246,6 +246,7 @@ qupv3_0: qcom,qupv3_0_geni_se@9c0000 { compatible = "qcom,qupv3-geni-se"; reg = <0x9c0000 0x2000>; status = "ok"; }; /* GPI Instance */ Loading Loading @@ -298,6 +299,23 @@ }; }; /* SPI SE */ qupv3_se10_spi: spi@988000 { compatible = "qcom,spi-geni"; reg = <0x988000 0x4000>; reg-names = "se_phys"; #address-cells = <1>; #size-cells = <0>; dmas = <&gpi_dma0 0 2 1 64 0>, <&gpi_dma0 1 2 1 64 0>; dma-names = "tx", "rx"; spi-max-frequency = <50000000>; qcom,wrapper-core = <&qupv3_0>; qcom,le-vm; status = "disabled"; }; }; #include "lahaina-vm-ion.dtsi" #include "display/trustedvm-shima-sde.dtsi" Loading