Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 4a1f9dc1 authored by Michal Wajdeczko's avatar Michal Wajdeczko Committed by Chris Wilson
Browse files

drm/i915/guc: New GuC interrupt register for Gen11 



Gen11 defines new more flexible Host-to-GuC interrupt register.
Now the host can write any 32-bit payload to trigger an interrupt
and GuC can additionally read this payload from the register.
Current GuC firmware ignores the payload so we just write 0.

Bspec: 21043

Signed-off-by: default avatarMichal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: default avatarDaniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20190527183613.17076-9-michal.wajdeczko@intel.com
parent afac5092

drivers/gpu/drm/i915/intel_guc.c

+13 −1
Original line number Diff line number Diff line
@@ -34,6 +34,13 @@ static void gen8_guc_raise_irq(struct intel_guc *guc) 
	I915_WRITE(GUC_SEND_INTERRUPT, GUC_SEND_TRIGGER);

}



static void gen11_guc_raise_irq(struct intel_guc *guc)

{

	struct drm_i915_private *dev_priv = guc_to_i915(guc);



	I915_WRITE(GEN11_GUC_HOST_INTERRUPT, 0);

}



static inline i915_reg_t guc_send_reg(struct intel_guc *guc, u32 i)

{

	GEM_BUG_ON(!guc->send_regs.base);
@@ -63,6 +70,8 @@ void intel_guc_init_send_regs(struct intel_guc *guc) 


void intel_guc_init_early(struct intel_guc *guc)

{

	struct drm_i915_private *i915 = guc_to_i915(guc);



	intel_guc_fw_init_early(guc);

	intel_guc_ct_init_early(&guc->ct);

	intel_guc_log_init_early(&guc->log);
@@ -71,6 +80,9 @@ void intel_guc_init_early(struct intel_guc *guc) 
	spin_lock_init(&guc->irq_lock);

	guc->send = intel_guc_send_nop;

	guc->handler = intel_guc_to_host_event_handler_nop;

	if (INTEL_GEN(i915) >= 11)

		guc->notify = gen11_guc_raise_irq;

	else

		guc->notify = gen8_guc_raise_irq;

}

drivers/gpu/drm/i915/intel_guc_reg.h

+1 −0
Original line number Diff line number Diff line
@@ -103,6 +103,7 @@ 


#define GUC_SEND_INTERRUPT		_MMIO(0xc4c8)

#define   GUC_SEND_TRIGGER		  (1<<0)

#define GEN11_GUC_HOST_INTERRUPT	_MMIO(0x1901f0)



#define GUC_NUM_DOORBELLS		256