regulator/mfd: Support ROHM BD71847 power management IC (494edd26) · Commits · e / devices / android_kernel_fairphone_FP5

drivers/mfd/rohm-bd718x7.c

+29 −41

Original line number	Original line	Diff line number	Diff line
	@@ -7,21 +7,16 @@
	// Datasheet available from		// Datasheet available from
	// https://www.rohm.com/datasheet/BD71837MWV/bd71837mwv-e		// https://www.rohm.com/datasheet/BD71837MWV/bd71837mwv-e

			#include <linux/gpio_keys.h>
	#include <linux/i2c.h>		#include <linux/i2c.h>
	#include <linux/input.h>		#include <linux/input.h>
	#include <linux/interrupt.h>		#include <linux/interrupt.h>
	#include <linux/mfd/rohm-bd718x7.h>		#include <linux/mfd/rohm-bd718x7.h>
	#include <linux/mfd/core.h>		#include <linux/mfd/core.h>
	#include <linux/module.h>		#include <linux/module.h>
			#include <linux/of_device.h>
	#include <linux/regmap.h>		#include <linux/regmap.h>
			#include <linux/types.h>
	/*
	* gpio_keys.h requires definiton of bool. It is brought in
	* by above includes. Keep this as last until gpio_keys.h gets fixed.
	*/
	#include <linux/gpio_keys.h>

	static const u8 supported_revisions[] = { 0xA2 /* BD71837 */ };

	static struct gpio_keys_button button = {		static struct gpio_keys_button button = {
	.code = KEY_POWER,		.code = KEY_POWER,
	@@ -41,8 +36,8 @@ static struct mfd_cell bd71837_mfd_cells[] = {
	.platform_data = &bd718xx_powerkey_data,		.platform_data = &bd718xx_powerkey_data,
	.pdata_size = sizeof(bd718xx_powerkey_data),		.pdata_size = sizeof(bd718xx_powerkey_data),
	},		},
	{ .name = "bd71837-clk", },		{ .name = "bd718xx-clk", },
	{ .name = "bd71837-pmic", },		{ .name = "bd718xx-pmic", },
	};		};

	static const struct regmap_irq bd71837_irqs[] = {		static const struct regmap_irq bd71837_irqs[] = {
	@@ -61,16 +56,16 @@ static struct regmap_irq_chip bd71837_irq_chip = {
	.num_irqs = ARRAY_SIZE(bd71837_irqs),		.num_irqs = ARRAY_SIZE(bd71837_irqs),
	.num_regs = 1,		.num_regs = 1,
	.irq_reg_stride = 1,		.irq_reg_stride = 1,
	.status_base = BD71837_REG_IRQ,		.status_base = BD718XX_REG_IRQ,
	.mask_base = BD71837_REG_MIRQ,		.mask_base = BD718XX_REG_MIRQ,
	.ack_base = BD71837_REG_IRQ,		.ack_base = BD718XX_REG_IRQ,
	.init_ack_masked = true,		.init_ack_masked = true,
	.mask_invert = false,		.mask_invert = false,
	};		};

	static const struct regmap_range pmic_status_range = {		static const struct regmap_range pmic_status_range = {
	.range_min = BD71837_REG_IRQ,		.range_min = BD718XX_REG_IRQ,
	.range_max = BD71837_REG_POW_STATE,		.range_max = BD718XX_REG_POW_STATE,
	};		};

	static const struct regmap_access_table volatile_regs = {		static const struct regmap_access_table volatile_regs = {
	@@ -82,7 +77,7 @@ static const struct regmap_config bd71837_regmap_config = {
	.reg_bits = 8,		.reg_bits = 8,
	.val_bits = 8,		.val_bits = 8,
	.volatile_table = &volatile_regs,		.volatile_table = &volatile_regs,
	.max_register = BD71837_MAX_REGISTER - 1,		.max_register = BD718XX_MAX_REGISTER - 1,
	.cache_type = REGCACHE_RBTREE,		.cache_type = REGCACHE_RBTREE,
	};		};

	@@ -90,8 +85,12 @@ static int bd71837_i2c_probe(struct i2c_client *i2c,
	const struct i2c_device_id *id)		const struct i2c_device_id *id)
	{		{
	struct bd71837 *bd71837;		struct bd71837 *bd71837;
	int ret, i;		int ret;
	unsigned int val;
			if (!i2c->irq) {
			dev_err(&i2c->dev, "No IRQ configured\n");
			return -EINVAL;
			}

	bd71837 = devm_kzalloc(&i2c->dev, sizeof(struct bd71837), GFP_KERNEL);		bd71837 = devm_kzalloc(&i2c->dev, sizeof(struct bd71837), GFP_KERNEL);

	@@ -99,12 +98,8 @@ static int bd71837_i2c_probe(struct i2c_client *i2c,
	return -ENOMEM;		return -ENOMEM;

	bd71837->chip_irq = i2c->irq;		bd71837->chip_irq = i2c->irq;
			bd71837->chip_type = (unsigned int)(uintptr_t)
	if (!bd71837->chip_irq) {		of_device_get_match_data(&i2c->dev);
	dev_err(&i2c->dev, "No IRQ configured\n");
	return -EINVAL;
	}

	bd71837->dev = &i2c->dev;		bd71837->dev = &i2c->dev;
	dev_set_drvdata(&i2c->dev, bd71837);		dev_set_drvdata(&i2c->dev, bd71837);

	@@ -114,20 +109,6 @@ static int bd71837_i2c_probe(struct i2c_client *i2c,
	return PTR_ERR(bd71837->regmap);		return PTR_ERR(bd71837->regmap);
	}		}

	ret = regmap_read(bd71837->regmap, BD71837_REG_REV, &val);
	if (ret) {
	dev_err(&i2c->dev, "Read BD71837_REG_DEVICE failed\n");
	return ret;
	}
	for (i = 0; i < ARRAY_SIZE(supported_revisions); i++)
	if (supported_revisions[i] == val)
	break;

	if (i == ARRAY_SIZE(supported_revisions)) {
	dev_err(&i2c->dev, "Unsupported chip revision\n");
	return -ENODEV;
	}

	ret = devm_regmap_add_irq_chip(&i2c->dev, bd71837->regmap,		ret = devm_regmap_add_irq_chip(&i2c->dev, bd71837->regmap,
	bd71837->chip_irq, IRQF_ONESHOT, 0,		bd71837->chip_irq, IRQF_ONESHOT, 0,
	&bd71837_irq_chip, &bd71837->irq_data);		&bd71837_irq_chip, &bd71837->irq_data);
	@@ -138,7 +119,7 @@ static int bd71837_i2c_probe(struct i2c_client *i2c,

	/* Configure short press to 10 milliseconds */		/* Configure short press to 10 milliseconds */
	ret = regmap_update_bits(bd71837->regmap,		ret = regmap_update_bits(bd71837->regmap,
	BD71837_REG_PWRONCONFIG0,		BD718XX_REG_PWRONCONFIG0,
	BD718XX_PWRBTN_PRESS_DURATION_MASK,		BD718XX_PWRBTN_PRESS_DURATION_MASK,
	BD718XX_PWRBTN_SHORT_PRESS_10MS);		BD718XX_PWRBTN_SHORT_PRESS_10MS);
	if (ret) {		if (ret) {
	@@ -149,7 +130,7 @@ static int bd71837_i2c_probe(struct i2c_client *i2c,

	/* Configure long press to 10 seconds */		/* Configure long press to 10 seconds */
	ret = regmap_update_bits(bd71837->regmap,		ret = regmap_update_bits(bd71837->regmap,
	BD71837_REG_PWRONCONFIG1,		BD718XX_REG_PWRONCONFIG1,
	BD718XX_PWRBTN_PRESS_DURATION_MASK,		BD718XX_PWRBTN_PRESS_DURATION_MASK,
	BD718XX_PWRBTN_LONG_PRESS_10S);		BD718XX_PWRBTN_LONG_PRESS_10S);

	@@ -179,7 +160,14 @@ static int bd71837_i2c_probe(struct i2c_client *i2c,
	}		}

	static const struct of_device_id bd71837_of_match[] = {		static const struct of_device_id bd71837_of_match[] = {
	{ .compatible = "rohm,bd71837", },		{
			.compatible = "rohm,bd71837",
			.data = (void *)BD718XX_TYPE_BD71837,
			},
			{
			.compatible = "rohm,bd71847",
			.data = (void *)BD718XX_TYPE_BD71847,
			},
	{ }		{ }
	};		};
	MODULE_DEVICE_TABLE(of, bd71837_of_match);		MODULE_DEVICE_TABLE(of, bd71837_of_match);

drivers/regulator/bd71837-regulator.c

+726 −329

File changed.

Preview size limit exceeded, changes collapsed.

include/linux/mfd/rohm-bd718x7.h

+124 −147

Original line number	Original line	Diff line number	Diff line
	@@ -7,106 +7,125 @@
	#include <linux/regmap.h>		#include <linux/regmap.h>

	enum {		enum {
	BD71837_BUCK1 = 0,		BD718XX_TYPE_BD71837 = 0,
	BD71837_BUCK2,		BD718XX_TYPE_BD71847,
	BD71837_BUCK3,		BD718XX_TYPE_AMOUNT
	BD71837_BUCK4,
	BD71837_BUCK5,
	BD71837_BUCK6,
	BD71837_BUCK7,
	BD71837_BUCK8,
	BD71837_LDO1,
	BD71837_LDO2,
	BD71837_LDO3,
	BD71837_LDO4,
	BD71837_LDO5,
	BD71837_LDO6,
	BD71837_LDO7,
	BD71837_REGULATOR_CNT,
	};		};

	#define BD71837_BUCK1_VOLTAGE_NUM 0x40		enum {
	#define BD71837_BUCK2_VOLTAGE_NUM 0x40		BD718XX_BUCK1 = 0,
	#define BD71837_BUCK3_VOLTAGE_NUM 0x40		BD718XX_BUCK2,
	#define BD71837_BUCK4_VOLTAGE_NUM 0x40		BD718XX_BUCK3,
			BD718XX_BUCK4,
			BD718XX_BUCK5,
			BD718XX_BUCK6,
			BD718XX_BUCK7,
			BD718XX_BUCK8,
			BD718XX_LDO1,
			BD718XX_LDO2,
			BD718XX_LDO3,
			BD718XX_LDO4,
			BD718XX_LDO5,
			BD718XX_LDO6,
			BD718XX_LDO7,
			BD718XX_REGULATOR_AMOUNT,
			};

			/* Common voltage configurations
			*
			* Note, we support only one range of voltages for each buck/LDO until we
			* get pickable ranges support. (See range selection bits for BUCK5 and
			* LDO1. On BD71847 also the second no DVS buck and LDO5)
			*/

			#define BD718XX_DVS_BUCK_VOLTAGE_NUM 0x3D
			#define BD718XX_1ST_NODVS_BUCK_VOLTAGE_NUM 0x08
			#define BD71837_4TH_NODVS_BUCK_VOLTAGE_NUM 0x3D

			#define BD718XX_LDO1_VOLTAGE_NUM 0x04
			#define BD718XX_LDO2_VOLTAGE_NUM 0x02
			#define BD718XX_LDO3_VOLTAGE_NUM 0x10
			#define BD718XX_LDO4_VOLTAGE_NUM 0x0A
			#define BD718XX_LDO5_VOLTAGE_NUM 0x10
			#define BD718XX_LDO6_VOLTAGE_NUM 0x0A

	#define BD71837_BUCK5_VOLTAGE_NUM 0x08		/* BD71837 specific voltage configurations */
	#define BD71837_BUCK6_VOLTAGE_NUM 0x04		#define BD71837_BUCK6_VOLTAGE_NUM 0x04
	#define BD71837_BUCK7_VOLTAGE_NUM 0x08		#define BD71837_BUCK7_VOLTAGE_NUM 0x08
	#define BD71837_BUCK8_VOLTAGE_NUM 0x40

	#define BD71837_LDO1_VOLTAGE_NUM 0x04
	#define BD71837_LDO2_VOLTAGE_NUM 0x02
	#define BD71837_LDO3_VOLTAGE_NUM 0x10
	#define BD71837_LDO4_VOLTAGE_NUM 0x10
	#define BD71837_LDO5_VOLTAGE_NUM 0x10
	#define BD71837_LDO6_VOLTAGE_NUM 0x10
	#define BD71837_LDO7_VOLTAGE_NUM 0x10		#define BD71837_LDO7_VOLTAGE_NUM 0x10

			/* BD71847 specific voltage configurations */
			#define BD71847_BUCK4_VOLTAGE_NUM 0x04

			/* Registers specific to BD71837 */
	enum {		enum {
	BD71837_REG_REV = 0x00,
	BD71837_REG_SWRESET = 0x01,
	BD71837_REG_I2C_DEV = 0x02,
	BD71837_REG_PWRCTRL0 = 0x03,
	BD71837_REG_PWRCTRL1 = 0x04,
	BD71837_REG_BUCK1_CTRL = 0x05,
	BD71837_REG_BUCK2_CTRL = 0x06,
	BD71837_REG_BUCK3_CTRL = 0x07,		BD71837_REG_BUCK3_CTRL = 0x07,
	BD71837_REG_BUCK4_CTRL = 0x08,		BD71837_REG_BUCK4_CTRL = 0x08,
	BD71837_REG_BUCK5_CTRL = 0x09,
	BD71837_REG_BUCK6_CTRL = 0x0A,
	BD71837_REG_BUCK7_CTRL = 0x0B,
	BD71837_REG_BUCK8_CTRL = 0x0C,
	BD71837_REG_BUCK1_VOLT_RUN = 0x0D,
	BD71837_REG_BUCK1_VOLT_IDLE = 0x0E,
	BD71837_REG_BUCK1_VOLT_SUSP = 0x0F,
	BD71837_REG_BUCK2_VOLT_RUN = 0x10,
	BD71837_REG_BUCK2_VOLT_IDLE = 0x11,
	BD71837_REG_BUCK3_VOLT_RUN = 0x12,		BD71837_REG_BUCK3_VOLT_RUN = 0x12,
	BD71837_REG_BUCK4_VOLT_RUN = 0x13,		BD71837_REG_BUCK4_VOLT_RUN = 0x13,
	BD71837_REG_BUCK5_VOLT = 0x14,
	BD71837_REG_BUCK6_VOLT = 0x15,
	BD71837_REG_BUCK7_VOLT = 0x16,
	BD71837_REG_BUCK8_VOLT = 0x17,
	BD71837_REG_LDO1_VOLT = 0x18,
	BD71837_REG_LDO2_VOLT = 0x19,
	BD71837_REG_LDO3_VOLT = 0x1A,
	BD71837_REG_LDO4_VOLT = 0x1B,
	BD71837_REG_LDO5_VOLT = 0x1C,
	BD71837_REG_LDO6_VOLT = 0x1D,
	BD71837_REG_LDO7_VOLT = 0x1E,		BD71837_REG_LDO7_VOLT = 0x1E,
	BD71837_REG_TRANS_COND0 = 0x1F,		};
	BD71837_REG_TRANS_COND1 = 0x20,
	BD71837_REG_VRFAULTEN = 0x21,		/* Registers common for BD71837 and BD71847 */
			enum {
			BD718XX_REG_REV = 0x00,
			BD718XX_REG_SWRESET = 0x01,
			BD718XX_REG_I2C_DEV = 0x02,
			BD718XX_REG_PWRCTRL0 = 0x03,
			BD718XX_REG_PWRCTRL1 = 0x04,
			BD718XX_REG_BUCK1_CTRL = 0x05,
			BD718XX_REG_BUCK2_CTRL = 0x06,
			BD718XX_REG_1ST_NODVS_BUCK_CTRL = 0x09,
			BD718XX_REG_2ND_NODVS_BUCK_CTRL = 0x0A,
			BD718XX_REG_3RD_NODVS_BUCK_CTRL = 0x0B,
			BD718XX_REG_4TH_NODVS_BUCK_CTRL = 0x0C,
			BD718XX_REG_BUCK1_VOLT_RUN = 0x0D,
			BD718XX_REG_BUCK1_VOLT_IDLE = 0x0E,
			BD718XX_REG_BUCK1_VOLT_SUSP = 0x0F,
			BD718XX_REG_BUCK2_VOLT_RUN = 0x10,
			BD718XX_REG_BUCK2_VOLT_IDLE = 0x11,
			BD718XX_REG_1ST_NODVS_BUCK_VOLT = 0x14,
			BD718XX_REG_2ND_NODVS_BUCK_VOLT = 0x15,
			BD718XX_REG_3RD_NODVS_BUCK_VOLT = 0x16,
			BD718XX_REG_4TH_NODVS_BUCK_VOLT = 0x17,
			BD718XX_REG_LDO1_VOLT = 0x18,
			BD718XX_REG_LDO2_VOLT = 0x19,
			BD718XX_REG_LDO3_VOLT = 0x1A,
			BD718XX_REG_LDO4_VOLT = 0x1B,
			BD718XX_REG_LDO5_VOLT = 0x1C,
			BD718XX_REG_LDO6_VOLT = 0x1D,
			BD718XX_REG_TRANS_COND0 = 0x1F,
			BD718XX_REG_TRANS_COND1 = 0x20,
			BD718XX_REG_VRFAULTEN = 0x21,
	BD718XX_REG_MVRFLTMASK0 = 0x22,		BD718XX_REG_MVRFLTMASK0 = 0x22,
	BD718XX_REG_MVRFLTMASK1 = 0x23,		BD718XX_REG_MVRFLTMASK1 = 0x23,
	BD718XX_REG_MVRFLTMASK2 = 0x24,		BD718XX_REG_MVRFLTMASK2 = 0x24,
	BD71837_REG_RCVCFG = 0x25,		BD718XX_REG_RCVCFG = 0x25,
	BD71837_REG_RCVNUM = 0x26,		BD718XX_REG_RCVNUM = 0x26,
	BD71837_REG_PWRONCONFIG0 = 0x27,		BD718XX_REG_PWRONCONFIG0 = 0x27,
	BD71837_REG_PWRONCONFIG1 = 0x28,		BD718XX_REG_PWRONCONFIG1 = 0x28,
	BD71837_REG_RESETSRC = 0x29,		BD718XX_REG_RESETSRC = 0x29,
	BD71837_REG_MIRQ = 0x2A,		BD718XX_REG_MIRQ = 0x2A,
	BD71837_REG_IRQ = 0x2B,		BD718XX_REG_IRQ = 0x2B,
	BD71837_REG_IN_MON = 0x2C,		BD718XX_REG_IN_MON = 0x2C,
	BD71837_REG_POW_STATE = 0x2D,		BD718XX_REG_POW_STATE = 0x2D,
	BD71837_REG_OUT32K = 0x2E,		BD718XX_REG_OUT32K = 0x2E,
	BD71837_REG_REGLOCK = 0x2F,		BD718XX_REG_REGLOCK = 0x2F,
	BD71837_REG_OTPVER = 0xFF,		BD718XX_REG_OTPVER = 0xFF,
	BD71837_MAX_REGISTER = 0x100,		BD718XX_MAX_REGISTER = 0x100,
	};		};

	#define REGLOCK_PWRSEQ 0x1		#define REGLOCK_PWRSEQ 0x1
	#define REGLOCK_VREG 0x10		#define REGLOCK_VREG 0x10

	/* Generic BUCK control masks */		/* Generic BUCK control masks */
	#define BD71837_BUCK_SEL 0x02		#define BD718XX_BUCK_SEL 0x02
	#define BD71837_BUCK_EN 0x01		#define BD718XX_BUCK_EN 0x01
	#define BD71837_BUCK_RUN_ON 0x04		#define BD718XX_BUCK_RUN_ON 0x04

	/* Generic LDO masks */		/* Generic LDO masks */
	#define BD71837_LDO_SEL 0x80		#define BD718XX_LDO_SEL 0x80
	#define BD71837_LDO_EN 0x40		#define BD718XX_LDO_EN 0x40

	/* BD71837 BUCK ramp rate CTRL reg bits */		/* BD71837 BUCK ramp rate CTRL reg bits */
	#define BUCK_RAMPRATE_MASK 0xC0		#define BUCK_RAMPRATE_MASK 0xC0
	@@ -115,49 +134,27 @@ enum {
	#define BUCK_RAMPRATE_2P50MV 0x2		#define BUCK_RAMPRATE_2P50MV 0x2
	#define BUCK_RAMPRATE_1P25MV 0x3		#define BUCK_RAMPRATE_1P25MV 0x3

	/* BD71837_REG_BUCK1_VOLT_RUN bits */		#define DVS_BUCK_RUN_MASK 0x3F
	#define BUCK1_RUN_MASK 0x3F		#define DVS_BUCK_SUSP_MASK 0x3F
	#define BUCK1_RUN_DEFAULT 0x14		#define DVS_BUCK_IDLE_MASK 0x3F

	/* BD71837_REG_BUCK1_VOLT_SUSP bits */
	#define BUCK1_SUSP_MASK 0x3F
	#define BUCK1_SUSP_DEFAULT 0x14

	/* BD71837_REG_BUCK1_VOLT_IDLE bits */		#define BD718XX_1ST_NODVS_BUCK_MASK 0x07
	#define BUCK1_IDLE_MASK 0x3F		#define BD71847_BUCK4_MASK 0x03
	#define BUCK1_IDLE_DEFAULT 0x14		#define BD71837_BUCK6_MASK 0x03
			#define BD718XX_3RD_NODVS_BUCK_MASK 0x07
			#define BD718XX_4TH_NODVS_BUCK_MASK 0x3F

	/* BD71837_REG_BUCK2_VOLT_RUN bits */		#define BD718XX_LDO1_MASK 0x03
	#define BUCK2_RUN_MASK 0x3F		#define BD718XX_LDO2_MASK 0x20
	#define BUCK2_RUN_DEFAULT 0x1E		#define BD718XX_LDO3_MASK 0x0F
			#define BD718XX_LDO4_MASK 0x0F
			#define BD718XX_LDO6_MASK 0x0F

	/* BD71837_REG_BUCK2_VOLT_IDLE bits */		#define BD71837_LDO5_MASK 0x0F
	#define BUCK2_IDLE_MASK 0x3F		#define BD71847_LDO5_MASK 0x0F
	#define BUCK2_IDLE_DEFAULT 0x14

	/* BD71837_REG_BUCK3_VOLT_RUN bits */		#define BD71837_LDO7_MASK 0x0F
	#define BUCK3_RUN_MASK 0x3F
	#define BUCK3_RUN_DEFAULT 0x1E

	/* BD71837_REG_BUCK4_VOLT_RUN bits */
	#define BUCK4_RUN_MASK 0x3F
	#define BUCK4_RUN_DEFAULT 0x1E

	/* BD71837_REG_BUCK5_VOLT bits */
	#define BUCK5_MASK 0x07
	#define BUCK5_DEFAULT 0x02

	/* BD71837_REG_BUCK6_VOLT bits */
	#define BUCK6_MASK 0x03
	#define BUCK6_DEFAULT 0x03

	/* BD71837_REG_BUCK7_VOLT bits */
	#define BUCK7_MASK 0x07
	#define BUCK7_DEFAULT 0x03

	/* BD71837_REG_BUCK8_VOLT bits */
	#define BUCK8_MASK 0x3F
	#define BUCK8_DEFAULT 0x1E

	/* BD718XX Voltage monitoring masks */		/* BD718XX Voltage monitoring masks */
	#define BD718XX_BUCK1_VRMON80 0x1		#define BD718XX_BUCK1_VRMON80 0x1
	@@ -221,27 +218,6 @@ enum {
	#define BD71837_INT_ON_REQ_MASK 0x2		#define BD71837_INT_ON_REQ_MASK 0x2
	#define BD71837_INT_STBY_REQ_MASK 0x1		#define BD71837_INT_STBY_REQ_MASK 0x1

	/* BD71837_REG_LDO1_VOLT bits */
	#define LDO1_MASK 0x03

	/* BD71837_REG_LDO1_VOLT bits */
	#define LDO2_MASK 0x20

	/* BD71837_REG_LDO3_VOLT bits */
	#define LDO3_MASK 0x0F

	/* BD71837_REG_LDO4_VOLT bits */
	#define LDO4_MASK 0x0F

	/* BD71837_REG_LDO5_VOLT bits */
	#define LDO5_MASK 0x0F

	/* BD71837_REG_LDO6_VOLT bits */
	#define LDO6_MASK 0x0F

	/* BD71837_REG_LDO7_VOLT bits */
	#define LDO7_MASK 0x0F

	/* Register write induced reset settings */		/* Register write induced reset settings */

	/*		/*
	@@ -341,10 +317,11 @@ enum {
	BD718XX_PWRBTN_LONG_PRESS_15S		BD718XX_PWRBTN_LONG_PRESS_15S
	};		};

	struct bd71837_pmic;		struct bd718xx_pmic;
	struct bd71837_clk;		struct bd718xx_clk;

	struct bd71837 {		struct bd71837 {
			unsigned int chip_type;
	struct device *dev;		struct device *dev;
	struct regmap *regmap;		struct regmap *regmap;
	unsigned long int id;		unsigned long int id;
	@@ -352,8 +329,8 @@ struct bd71837 {
	int chip_irq;		int chip_irq;
	struct regmap_irq_chip_data *irq_data;		struct regmap_irq_chip_data *irq_data;

	struct bd71837_pmic *pmic;		struct bd718xx_pmic *pmic;
	struct bd71837_clk *clk;		struct bd718xx_clk *clk;
	};		};

	#endif /* __LINUX_MFD_BD71837_H__ */		#endif /* __LINUX_MFD_BD71837_H__ */