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Commit 493872e0 authored by Linus Walleij's avatar Linus Walleij
Browse files

Merge tag 'intel-gpio-v4.21-1' of... 

Merge tag 'intel-gpio-v4.21-1' of git://git.kernel.org/pub/scm/linux/kernel/git/andy/linux-gpio-intel into devel

intel-gpio for v4.21-1

Use managed resource allocation in pch and sodaville drivers.
Switch to use for_each_set_bit() in IRQ handlers.
Headers clean up.
Sort headers in inclusion block alphabetically for better maintenance.
Convert to SPDX identifier and fixing MODULE_LICENSE() when appropriate.
Additional format fixes to rectify debug and message printing.

There is a commit which had been applied to v4.20-rc4, that's why dup.

- c3bc3ff9 MAINTAINERS: Do maintain Intel GPIO drivers via separate tree

The following is an automated git shortlog grouped by driver:

ich:
 -  Convert to use SPDX identifier
 -  Sort headers alphabetically
 -  Join string literals back
 -  Convert pr_<level> to dev_<level>
 -  Switch to use struct device instead of platform_device
 -  Simplify error handling in ichx_write_bit()

intel-mid:
 -  Convert to use SPDX identifier
 -  Remove linux/module.h and sort headers

lynxpoint:
 -  Convert to use SPDX identifier
 -  Remove linux/init.h and sort headers
 -  Use for_each_set_bit() in IRQ handler

MAINTAINERS:
 -  Do maintain Intel GPIO drivers via separate tree

merrifield:
 -  Convert to use SPDX identifier
 -  Remove linux/init.h

pch:
 -  Convert to use SPDX identifier
 -  Sort headers alphabetically
 -  Remove duplicate assignments
 -  Remove redundant __func__ from debug print
 -  Use for_each_set_bit() in IRQ handler
 -  Convert to dev_pm_ops
 -  Convert to use managed functions pcim_* and devm_*

sch:
 -  Convert to use SPDX identifier
 -  Remove linux/init.h and sort headers

sodaville:
 -  Convert to use SPDX identifier
 -  Sort headers alphabetically
 -  Use for_each_set_bit() in IRQ handler
 -  Convert to use managed functions pcim_* and devm_*
parents 21abf103 aaa21231

MAINTAINERS

+21 −12
Original line number Diff line number Diff line
@@ -7428,6 +7428,20 @@ S: Maintained 
F:	Documentation/fb/intelfb.txt

F:	drivers/video/fbdev/intelfb/



INTEL GPIO DRIVERS

M:	Andy Shevchenko <andriy.shevchenko@linux.intel.com>

L:	linux-gpio@vger.kernel.org

S:	Maintained

T:	git git://git.kernel.org/pub/scm/linux/kernel/git/andy/linux-gpio-intel.git

F:	drivers/gpio/gpio-ich.c

F:	drivers/gpio/gpio-intel-mid.c

F:	drivers/gpio/gpio-lynxpoint.c

F:	drivers/gpio/gpio-merrifield.c

F:	drivers/gpio/gpio-ml-ioh.c

F:	drivers/gpio/gpio-pch.c

F:	drivers/gpio/gpio-sch.c

F:	drivers/gpio/gpio-sodaville.c



INTEL GVT-g DRIVERS (Intel GPU Virtualization)

M:	Zhenyu Wang <zhenyuw@linux.intel.com>

M:	Zhi Wang <zhi.a.wang@intel.com>
@@ -7438,12 +7452,6 @@ T: git https://github.com/intel/gvt-linux.git 
S:	Supported

F:	drivers/gpu/drm/i915/gvt/



INTEL PMIC GPIO DRIVER

R:	Andy Shevchenko <andriy.shevchenko@linux.intel.com>

S:	Maintained

F:	drivers/gpio/gpio-*cove.c

F:	drivers/gpio/gpio-msic.c



INTEL HID EVENT DRIVER

M:	Alex Hung <alex.hung@canonical.com>

L:	platform-driver-x86@vger.kernel.org
@@ -7531,12 +7539,6 @@ W: https://01.org/linux-acpi 
S:	Supported

F:	drivers/platform/x86/intel_menlow.c



INTEL MERRIFIELD GPIO DRIVER

M:	Andy Shevchenko <andriy.shevchenko@linux.intel.com>

L:	linux-gpio@vger.kernel.org

S:	Maintained

F:	drivers/gpio/gpio-merrifield.c



INTEL MIC DRIVERS (mic)

M:	Sudeep Dutt <sudeep.dutt@intel.com>

M:	Ashutosh Dixit <ashutosh.dixit@intel.com>
@@ -7569,6 +7571,13 @@ F: drivers/platform/x86/intel_punit_ipc.c 
F:	arch/x86/include/asm/intel_pmc_ipc.h

F:	arch/x86/include/asm/intel_punit_ipc.h



INTEL PMIC GPIO DRIVERS

M:	Andy Shevchenko <andriy.shevchenko@linux.intel.com>

S:	Maintained

T:	git git://git.kernel.org/pub/scm/linux/kernel/git/andy/linux-gpio-intel.git

F:	drivers/gpio/gpio-*cove.c

F:	drivers/gpio/gpio-msic.c



INTEL MULTIFUNCTION PMIC DEVICE DRIVERS

R:	Andy Shevchenko <andriy.shevchenko@linux.intel.com>

S:	Maintained

drivers/gpio/gpio-ich.c

+25 −48
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0+

/*

 * Intel ICH6-10, Series 5 and 6, Atom C2000 (Avoton/Rangeley) GPIO driver

 *

 * Copyright (C) 2010 Extreme Engineering Solutions.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License as published by

 * the Free Software Foundation; either version 2 of the License, or

 * (at your option) any later version.

 *

 * This program is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 *

 * You should have received a copy of the GNU General Public License

 * along with this program; if not, write to the Free Software

 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.

 */



#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt



#include <linux/bitops.h>

#include <linux/gpio/driver.h>

#include <linux/ioport.h>

#include <linux/mfd/lpc_ich.h>

#include <linux/module.h>

#include <linux/pci.h>

#include <linux/gpio/driver.h>

#include <linux/platform_device.h>

#include <linux/mfd/lpc_ich.h>

#include <linux/bitops.h>



#define DRV_NAME "gpio_ich"
@@ -100,7 +86,7 @@ struct ichx_desc { 


static struct {

	spinlock_t lock;

	struct platform_device *dev;

	struct device *dev;

	struct gpio_chip chip;

	struct resource *gpio_base;	/* GPIO IO base */

	struct resource *pm_base;	/* Power Mangagment IO base */
@@ -112,8 +98,7 @@ static struct { 


static int modparam_gpiobase = -1;	/* dynamic */

module_param_named(gpiobase, modparam_gpiobase, int, 0444);

MODULE_PARM_DESC(gpiobase, "The GPIO number base. -1 means dynamic, "

			   "which is the default.");

MODULE_PARM_DESC(gpiobase, "The GPIO number base. -1 means dynamic, which is the default.");



static int ichx_write_bit(int reg, unsigned nr, int val, int verify)

{
@@ -121,7 +106,6 @@ static int ichx_write_bit(int reg, unsigned nr, int val, int verify) 
	u32 data, tmp;

	int reg_nr = nr / 32;

	int bit = nr & 0x1f;

	int ret = 0;



	spin_lock_irqsave(&ichx_priv.lock, flags);
@@ -142,12 +126,10 @@ static int ichx_write_bit(int reg, unsigned nr, int val, int verify) 


	tmp = ICHX_READ(ichx_priv.desc->regs[reg][reg_nr],

			ichx_priv.gpio_base);

	if (verify && data != tmp)

		ret = -EPERM;



	spin_unlock_irqrestore(&ichx_priv.lock, flags);



	return ret;

	return (verify && data != tmp) ? -EPERM : 0;

}



static int ichx_read_bit(int reg, unsigned nr)
@@ -186,10 +168,7 @@ static int ichx_gpio_direction_input(struct gpio_chip *gpio, unsigned nr) 
	 * Try setting pin as an input and verify it worked since many pins

	 * are output-only.

	 */

	if (ichx_write_bit(GPIO_IO_SEL, nr, 1, 1))

		return -EINVAL;



	return 0;

	return ichx_write_bit(GPIO_IO_SEL, nr, 1, 1);

}



static int ichx_gpio_direction_output(struct gpio_chip *gpio, unsigned nr,
@@ -206,10 +185,7 @@ static int ichx_gpio_direction_output(struct gpio_chip *gpio, unsigned nr, 
	 * Try setting pin as an output and verify it worked since many pins

	 * are input-only.

	 */

	if (ichx_write_bit(GPIO_IO_SEL, nr, 0, 1))

		return -EINVAL;



	return 0;

	return ichx_write_bit(GPIO_IO_SEL, nr, 0, 1);

}



static int ichx_gpio_get(struct gpio_chip *chip, unsigned nr)
@@ -284,7 +260,7 @@ static void ichx_gpiolib_setup(struct gpio_chip *chip) 
{

	chip->owner = THIS_MODULE;

	chip->label = DRV_NAME;

	chip->parent = &ichx_priv.dev->dev;

	chip->parent = ichx_priv.dev;



	/* Allow chip-specific overrides of request()/get() */

	chip->request = ichx_priv.desc->request ?
@@ -407,15 +383,14 @@ static int ichx_gpio_request_regions(struct device *dev, 


static int ichx_gpio_probe(struct platform_device *pdev)

{

	struct device *dev = &pdev->dev;

	struct lpc_ich_info *ich_info = dev_get_platdata(dev);

	struct resource *res_base, *res_pm;

	int err;

	struct lpc_ich_info *ich_info = dev_get_platdata(&pdev->dev);



	if (!ich_info)

		return -ENODEV;



	ichx_priv.dev = pdev;



	switch (ich_info->gpio_version) {

	case ICH_I3100_GPIO:

		ichx_priv.desc = &i3100_desc;
@@ -445,19 +420,21 @@ static int ichx_gpio_probe(struct platform_device *pdev) 
		return -ENODEV;

	}



	ichx_priv.dev = dev;

	spin_lock_init(&ichx_priv.lock);



	res_base = platform_get_resource(pdev, IORESOURCE_IO, ICH_RES_GPIO);

	ichx_priv.use_gpio = ich_info->use_gpio;

	err = ichx_gpio_request_regions(&pdev->dev, res_base, pdev->name,

					ichx_priv.use_gpio);

	err = ichx_gpio_request_regions(dev, res_base, pdev->name,

					ich_info->use_gpio);

	if (err)

		return err;



	ichx_priv.gpio_base = res_base;

	ichx_priv.use_gpio = ich_info->use_gpio;



	/*

	 * If necessary, determine the I/O address of ACPI/power management

	 * registers which are needed to read the the GPE0 register for GPI pins

	 * registers which are needed to read the GPE0 register for GPI pins

	 * 0 - 15 on some chipsets.

	 */

	if (!ichx_priv.desc->uses_gpe0)
@@ -465,13 +442,13 @@ static int ichx_gpio_probe(struct platform_device *pdev) 


	res_pm = platform_get_resource(pdev, IORESOURCE_IO, ICH_RES_GPE0);

	if (!res_pm) {

		pr_warn("ACPI BAR is unavailable, GPI 0 - 15 unavailable\n");

		dev_warn(dev, "ACPI BAR is unavailable, GPI 0 - 15 unavailable\n");

		goto init;

	}



	if (!devm_request_region(&pdev->dev, res_pm->start,

			resource_size(res_pm), pdev->name)) {

		pr_warn("ACPI BAR is busy, GPI 0 - 15 unavailable\n");

	if (!devm_request_region(dev, res_pm->start, resource_size(res_pm),

				 pdev->name)) {

		dev_warn(dev, "ACPI BAR is busy, GPI 0 - 15 unavailable\n");

		goto init;

	}
@@ -481,12 +458,12 @@ static int ichx_gpio_probe(struct platform_device *pdev) 
	ichx_gpiolib_setup(&ichx_priv.chip);

	err = gpiochip_add_data(&ichx_priv.chip, NULL);

	if (err) {

		pr_err("Failed to register GPIOs\n");

		dev_err(dev, "Failed to register GPIOs\n");

		return err;

	}



	pr_info("GPIO from %d to %d on %s\n", ichx_priv.chip.base,

	       ichx_priv.chip.base + ichx_priv.chip.ngpio - 1, DRV_NAME);

	dev_info(dev, "GPIO from %d to %d\n", ichx_priv.chip.base,

		 ichx_priv.chip.base + ichx_priv.chip.ngpio - 1);



	return 0;

}

drivers/gpio/gpio-intel-mid.c

+3 −13
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0

/*

 * Intel MID GPIO driver

 *

 * Copyright (c) 2008-2014,2016 Intel Corporation.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 as

 * published by the Free Software Foundation.

 *

 * This program is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 */



/* Supports:
@@ -20,12 +12,11 @@ 
 */



#include <linux/delay.h>

#include <linux/gpio/driver.h>

#include <linux/init.h>

#include <linux/interrupt.h>

#include <linux/io.h>

#include <linux/gpio/driver.h>

#include <linux/kernel.h>

#include <linux/module.h>

#include <linux/pci.h>

#include <linux/platform_device.h>

#include <linux/pm_runtime.h>
@@ -273,9 +264,8 @@ static const struct pci_device_id intel_gpio_ids[] = { 
		PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x08f7),

		.driver_data = (kernel_ulong_t)&gpio_cloverview_core,

	},

	{ 0 }

	{ }

};

MODULE_DEVICE_TABLE(pci, intel_gpio_ids);



static void intel_mid_irq_handler(struct irq_desc *desc)

{

drivers/gpio/gpio-lynxpoint.c

+16 −28
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0

/*

 * GPIO controller driver for Intel Lynxpoint PCH chipset>

 * Copyright (c) 2012, Intel Corporation.

 *

 * Author: Mathias Nyman <mathias.nyman@linux.intel.com>

 *

 * This program is free software; you can redistribute it and/or modify it

 * under the terms and conditions of the GNU General Public License,

 * version 2, as published by the Free Software Foundation.

 *

 * This program is distributed in the hope it will be useful, but WITHOUT

 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or

 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for

 * more details.

 *

 * You should have received a copy of the GNU General Public License along with

 * this program; if not, write to the Free Software Foundation, Inc.,

 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.

 *

 */



#include <linux/kernel.h>

#include <linux/module.h>

#include <linux/init.h>

#include <linux/types.h>

#include <linux/acpi.h>

#include <linux/bitops.h>

#include <linux/interrupt.h>

#include <linux/gpio/driver.h>

#include <linux/slab.h>

#include <linux/acpi.h>

#include <linux/interrupt.h>

#include <linux/io.h>

#include <linux/kernel.h>

#include <linux/module.h>

#include <linux/platform_device.h>

#include <linux/pm_runtime.h>

#include <linux/io.h>

#include <linux/slab.h>

#include <linux/types.h>



/* LynxPoint chipset has support for 94 gpio pins */
@@ -240,21 +226,23 @@ static void lp_gpio_irq_handler(struct irq_desc *desc) 
	struct gpio_chip *gc = irq_desc_get_handler_data(desc);

	struct lp_gpio *lg = gpiochip_get_data(gc);

	struct irq_chip *chip = irq_data_get_irq_chip(data);

	u32 base, pin, mask;

	unsigned long reg, ena, pending;

	u32 base, pin;



	/* check from GPIO controller which pin triggered the interrupt */

	for (base = 0; base < lg->chip.ngpio; base += 32) {

		reg = lp_gpio_reg(&lg->chip, base, LP_INT_STAT);

		ena = lp_gpio_reg(&lg->chip, base, LP_INT_ENABLE);



		while ((pending = (inl(reg) & inl(ena)))) {

		/* Only interrupts that are enabled */

		pending = inl(reg) & inl(ena);



		for_each_set_bit(pin, &pending, 32) {

			unsigned irq;



			pin = __ffs(pending);

			mask = BIT(pin);

			/* Clear before handling so we don't lose an edge */

			outl(mask, reg);

			outl(BIT(pin), reg);



			irq = irq_find_mapping(lg->chip.irq.domain, base + pin);

			generic_handle_irq(irq);

		}
@@ -466,5 +454,5 @@ module_exit(lp_gpio_exit); 


MODULE_AUTHOR("Mathias Nyman (Intel)");

MODULE_DESCRIPTION("GPIO interface for Intel Lynxpoint");

MODULE_LICENSE("GPL");

MODULE_LICENSE("GPL v2");

MODULE_ALIAS("platform:lp_gpio");

drivers/gpio/gpio-merrifield.c

+1 −5
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0

/*

 * Intel Merrifield SoC GPIO driver

 *

 * Copyright (c) 2016 Intel Corporation.

 * Author: Andy Shevchenko <andriy.shevchenko@linux.intel.com>

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 as

 * published by the Free Software Foundation.

 */



#include <linux/acpi.h>

#include <linux/bitops.h>

#include <linux/gpio/driver.h>

#include <linux/init.h>

#include <linux/interrupt.h>

#include <linux/io.h>

#include <linux/module.h>