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Commit 493199e0 authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
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Merge "bindings: clock: Add support for SCUBA clock controllers"

parents 02bf2509 39cbf4c5

bindings/clock/qcom,debugcc.txt

+1 −0
Original line number Diff line number Diff line
@@ -16,6 +16,7 @@ Required properties : 
			"qcom,monaco-debugcc"

			"qcom,direwolf-debugcc"

			"qcom,blair-debugcc"

			"qcom,scuba-debugcc"



- qcom,gcc: phandle to the GCC device node.

- qcom,videocc: phandle to the Video CC device node.

bindings/clock/qcom,dispcc.txt

+1 −0
Original line number Diff line number Diff line
@@ -18,6 +18,7 @@ Required properties : 
			"qcom,sa6155-dispcc"

			"qcom,monaco-dispcc"

			"qcom,blair-dispcc"

			"qcom,scuba-dispcc"



- reg : shall contain base register location and length.

- #clock-cells : from common clock binding, shall contain 1.

bindings/clock/qcom,gcc.txt

+1 −0
Original line number Diff line number Diff line
@@ -40,6 +40,7 @@ Required properties : 
			"qcom,monaco-gcc"

			"qcom,direwolf-gcc"

			"qcom,blair-gcc"

			"qcom,scuba-gcc"



- reg : shall contain base register location and length

- vdd_cx-supply: The vdd_cx logic rail supply.

bindings/clock/qcom,gpucc.txt

+1 −0
Original line number Diff line number Diff line
@@ -14,6 +14,7 @@ Required properties : 
		"qcom,sa6155-gpucc".

		"qcom,monaco-gpucc"

		"qcom,blair-gpucc"

		"qcom,scuba-gpucc"



- reg: shall contain base register offset and size.

- reg-names: names of registers listed in the same order as in the reg property.

bindings/clock/qcom,rpmcc.txt

+1 −0
Original line number Diff line number Diff line
@@ -21,6 +21,7 @@ Required properties : 
			"qcom,rpmcc-holi", "qcom,rpmcc"

			"qcom,rpmcc-sdxnightjar", "qcom,rpmcc"

			"qcom,rpmcc-monaco", "qcom,rpmcc"

			"qcom,rpmcc-scuba", "qcom,rpmcc"



- #clock-cells : shall contain 1