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Commit 48f1fc3a authored by Mika Kuoppala's avatar Mika Kuoppala Committed by Mika Kuoppala
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drm/i915/g33: Improve reset reliability 



We improved the reset reliablity on gen4 with
stopping all engines before commencing reset, in
commit 2c80353f ("drm/i915/g4x: Improve gpu reset reliability")

Evidence indicates that this same trick works with g33.

v2: proper gen naming, comment readability (Chris)

Testcase: igt/gem_busy/*-hang #blb-e6850
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tomi Sarvela <tomi.p.sarvela@intel.com>
Signed-off-by: default avatarMika Kuoppala <mika.kuoppala@intel.com>
Acked-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Link: http://patchwork.freedesktop.org/patch/msgid/20170522090244.2557-1-mika.kuoppala@intel.com
parent 6bdba819

drivers/gpu/drm/i915/intel_uncore.c

+3 −0
Original line number Diff line number Diff line
@@ -1488,6 +1488,9 @@ static int g33_do_reset(struct drm_i915_private *dev_priv, unsigned engine_mask) 
{

	struct pci_dev *pdev = dev_priv->drm.pdev;



	/* Stop engines before we reset; see g4x_do_reset() below for why. */

	gen3_stop_rings(dev_priv);



	pci_write_config_byte(pdev, I915_GDRST, GRDOM_RESET_ENABLE);

	return wait_for(g4x_reset_complete(pdev), 500);

}