Merge "qcom: pil: Move the IMEM location for disabling timeouts" (487ed773) · Commits · e / devices / android_kernel_fairphone_FP5

drivers/soc/qcom/peripheral-loader.c

+41 −18

Original line number	Original line	Diff line number	Diff line
	@@ -54,6 +54,7 @@
	#define NUM_OF_ENCRYPTED_KEY 3		#define NUM_OF_ENCRYPTED_KEY 3

	static void __iomem *pil_info_base;		static void __iomem *pil_info_base;
			static void __iomem *pil_disable_timeout_base;
	static struct md_global_toc *g_md_toc;		static struct md_global_toc *g_md_toc;

	/**		/**
	@@ -1676,39 +1677,61 @@ static int pil_pm_notify(struct notifier_block b, unsigned long event, void p)
	static struct notifier_block pil_pm_notifier = {		static struct notifier_block pil_pm_notifier = {
	.notifier_call = pil_pm_notify,		.notifier_call = pil_pm_notify,
	};		};
			static void __iomem * __init pil_get_resource(const char *prop,
	static int __init msm_pil_init(void)		resource_size_t *out_size)
	{		{
			void __iomem *base_addr;
	struct device_node *np;		struct device_node *np;
	struct resource res;		struct resource res;
	int i;

	np = of_find_compatible_node(NULL, NULL, "qcom,msm-imem-pil");		np = of_find_compatible_node(NULL, NULL, prop);
	if (!np) {		if (!np) {
	pr_warn("pil: failed to find qcom,msm-imem-pil node\n");		pr_warn("pil: failed to find %s node\n", prop);
	goto out;		return NULL;
	}		}

	if (of_address_to_resource(np, 0, &res)) {		if (of_address_to_resource(np, 0, &res)) {
	pr_warn("pil: address to resource on imem region failed\n");		pr_warn("pil: address to resource for %s failed\n", prop);
	goto out;		return NULL;
	}		}
	pil_info_base = ioremap(res.start, resource_size(&res));
	if (!pil_info_base) {		base_addr = ioremap(res.start, resource_size(&res));
	pr_warn("pil: could not map imem region\n");		if (!base_addr) {
	goto out;		pr_warn("pil: could not map region for %s\n", prop);
			return NULL;
			}

			if (out_size)
			*out_size = resource_size(&res);

			return base_addr;
	}		}
	if (__raw_readl(pil_info_base) == 0x53444247) {		static int __init msm_pil_init(void)
			{
			resource_size_t res_size;
			int i;

			pil_info_base = pil_get_resource("qcom,msm-imem-pil", &res_size);
			if (pil_info_base) {
			for (i = 0; i < res_size / sizeof(u32); i++)
			writel_relaxed(0, pil_info_base + (i * sizeof(u32)));
			}

			pil_disable_timeout_base =
			pil_get_resource("qcom,msm-imem-pil-disable-timeout", NULL);
			if (pil_disable_timeout_base) {
			if (__raw_readl(pil_disable_timeout_base) == 0x53444247) {
	pr_info("pil: pil-imem set to disable pil timeouts\n");		pr_info("pil: pil-imem set to disable pil timeouts\n");
	disable_timeouts = true;		disable_timeouts = true;
	}		}
	for (i = 0; i < resource_size(&res)/sizeof(u32); i++)
	writel_relaxed(0, pil_info_base + (i * sizeof(u32)));		iounmap(pil_disable_timeout_base);
			}

	pil_wq = alloc_workqueue("pil_workqueue", WQ_HIGHPRI \| WQ_UNBOUND, 0);		pil_wq = alloc_workqueue("pil_workqueue", WQ_HIGHPRI \| WQ_UNBOUND, 0);
	if (!pil_wq)		if (!pil_wq)
	pr_warn("pil: Defaulting to sequential firmware loading.\n");		pr_warn("pil: Defaulting to sequential firmware loading.\n");

	out:
	return register_pm_notifier(&pil_pm_notifier);		return register_pm_notifier(&pil_pm_notifier);
	}		}
	subsys_initcall(msm_pil_init);		subsys_initcall(msm_pil_init);