Loading qcom/sdxnightjar.dtsi +6 −3 Original line number Diff line number Diff line Loading @@ -318,7 +318,8 @@ compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; reg = <0x78af000 0x200>; interrupts = <0 107 0>; /*TODO: Fix the clock when tree is available*/ clocks = <&gcc GCC_BLSP1_UART1_APPS_CLK>, <&gcc GCC_BLSP1_AHB_CLK>; clock-names = "core", "iface"; status = "disabled"; }; Loading @@ -327,7 +328,8 @@ compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; reg = <0x78b0000 0x200>; interrupts = <0 108 0>; /*TODO: Fix the clock when tree is available*/ clocks = <&gcc GCC_BLSP1_UART2_APPS_CLK>, <&gcc GCC_BLSP1_AHB_CLK>; clock-names = "core", "iface"; status = "disabled"; }; Loading @@ -336,7 +338,8 @@ compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; reg = <0x78b1000 0x200>; interrupts = <0 109 0>; /*TODO: Fix the clock when tree is available*/ clocks = <&gcc GCC_BLSP1_UART3_APPS_CLK>, <&gcc GCC_BLSP1_AHB_CLK>; clock-names = "core", "iface"; status = "disabled"; }; Loading Loading
qcom/sdxnightjar.dtsi +6 −3 Original line number Diff line number Diff line Loading @@ -318,7 +318,8 @@ compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; reg = <0x78af000 0x200>; interrupts = <0 107 0>; /*TODO: Fix the clock when tree is available*/ clocks = <&gcc GCC_BLSP1_UART1_APPS_CLK>, <&gcc GCC_BLSP1_AHB_CLK>; clock-names = "core", "iface"; status = "disabled"; }; Loading @@ -327,7 +328,8 @@ compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; reg = <0x78b0000 0x200>; interrupts = <0 108 0>; /*TODO: Fix the clock when tree is available*/ clocks = <&gcc GCC_BLSP1_UART2_APPS_CLK>, <&gcc GCC_BLSP1_AHB_CLK>; clock-names = "core", "iface"; status = "disabled"; }; Loading @@ -336,7 +338,8 @@ compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; reg = <0x78b1000 0x200>; interrupts = <0 109 0>; /*TODO: Fix the clock when tree is available*/ clocks = <&gcc GCC_BLSP1_UART3_APPS_CLK>, <&gcc GCC_BLSP1_AHB_CLK>; clock-names = "core", "iface"; status = "disabled"; }; Loading