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Commit 47a9c0ee authored by Marek Szyprowski's avatar Marek Szyprowski Committed by Kukjin Kim
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ARM: EXYNOS4: Add missing GPYx banks 



This patch adds missing GPYx gpio banks on Samsung EXYNOS4 platform.

Signed-off-by: default avatarMarek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: default avatarKyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: default avatarKukjin Kim <kgene.kim@samsung.com>
parent 6d0de157

arch/arm/mach-exynos4/gpiolib.c

+49 −0
Original line number Diff line number Diff line
@@ -198,6 +198,55 @@ static struct s3c_gpio_chip exynos4_gpio_part2_4bit[] = { 
			.ngpio	= EXYNOS4_GPIO_L2_NR,

			.label	= "GPL2",

		},

	}, {

		.config	= &gpio_cfg_noint,

		.chip	= {

			.base	= EXYNOS4_GPY0(0),

			.ngpio	= EXYNOS4_GPIO_Y0_NR,

			.label	= "GPY0",

		},

	}, {

		.config	= &gpio_cfg_noint,

		.chip	= {

			.base	= EXYNOS4_GPY1(0),

			.ngpio	= EXYNOS4_GPIO_Y1_NR,

			.label	= "GPY1",

		},

	}, {

		.config	= &gpio_cfg_noint,

		.chip	= {

			.base	= EXYNOS4_GPY2(0),

			.ngpio	= EXYNOS4_GPIO_Y2_NR,

			.label	= "GPY2",

		},

	}, {

		.config	= &gpio_cfg_noint,

		.chip	= {

			.base	= EXYNOS4_GPY3(0),

			.ngpio	= EXYNOS4_GPIO_Y3_NR,

			.label	= "GPY3",

		},

	}, {

		.config	= &gpio_cfg_noint,

		.chip	= {

			.base	= EXYNOS4_GPY4(0),

			.ngpio	= EXYNOS4_GPIO_Y4_NR,

			.label	= "GPY4",

		},

	}, {

		.config	= &gpio_cfg_noint,

		.chip	= {

			.base	= EXYNOS4_GPY5(0),

			.ngpio	= EXYNOS4_GPIO_Y5_NR,

			.label	= "GPY5",

		},

	}, {

		.config	= &gpio_cfg_noint,

		.chip	= {

			.base	= EXYNOS4_GPY6(0),

			.ngpio	= EXYNOS4_GPIO_Y6_NR,

			.label	= "GPY6",

		},

	}, {

		.base	= (S5P_VA_GPIO2 + 0xC00),

		.config	= &gpio_cfg_noint,

arch/arm/mach-exynos4/include/mach/gpio.h

+22 −1
Original line number Diff line number Diff line
@@ -50,6 +50,13 @@ 
#define EXYNOS4_GPIO_X1_NR	(8)

#define EXYNOS4_GPIO_X2_NR	(8)

#define EXYNOS4_GPIO_X3_NR	(8)

#define EXYNOS4_GPIO_Y0_NR	(6)

#define EXYNOS4_GPIO_Y1_NR	(4)

#define EXYNOS4_GPIO_Y2_NR	(6)

#define EXYNOS4_GPIO_Y3_NR	(8)

#define EXYNOS4_GPIO_Y4_NR	(8)

#define EXYNOS4_GPIO_Y5_NR	(8)

#define EXYNOS4_GPIO_Y6_NR	(8)

#define EXYNOS4_GPIO_Z_NR	(7)



/* GPIO bank numbers */
@@ -87,7 +94,14 @@ enum s5p_gpio_number { 
	EXYNOS4_GPIO_X1_START	= EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_X0),

	EXYNOS4_GPIO_X2_START	= EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_X1),

	EXYNOS4_GPIO_X3_START	= EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_X2),

	EXYNOS4_GPIO_Z_START	= EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_X3),

	EXYNOS4_GPIO_Y0_START	= EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_X3),

	EXYNOS4_GPIO_Y1_START	= EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_Y0),

	EXYNOS4_GPIO_Y2_START	= EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_Y1),

	EXYNOS4_GPIO_Y3_START	= EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_Y2),

	EXYNOS4_GPIO_Y4_START	= EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_Y3),

	EXYNOS4_GPIO_Y5_START	= EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_Y4),

	EXYNOS4_GPIO_Y6_START	= EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_Y5),

	EXYNOS4_GPIO_Z_START	= EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_Y6),

};



/* EXYNOS4 GPIO number definitions */
@@ -120,6 +134,13 @@ enum s5p_gpio_number { 
#define EXYNOS4_GPX1(_nr)	(EXYNOS4_GPIO_X1_START + (_nr))

#define EXYNOS4_GPX2(_nr)	(EXYNOS4_GPIO_X2_START + (_nr))

#define EXYNOS4_GPX3(_nr)	(EXYNOS4_GPIO_X3_START + (_nr))

#define EXYNOS4_GPY0(_nr)	(EXYNOS4_GPIO_Y0_START + (_nr))

#define EXYNOS4_GPY1(_nr)	(EXYNOS4_GPIO_Y1_START + (_nr))

#define EXYNOS4_GPY2(_nr)	(EXYNOS4_GPIO_Y2_START + (_nr))

#define EXYNOS4_GPY3(_nr)	(EXYNOS4_GPIO_Y3_START + (_nr))

#define EXYNOS4_GPY4(_nr)	(EXYNOS4_GPIO_Y4_START + (_nr))

#define EXYNOS4_GPY5(_nr)	(EXYNOS4_GPIO_Y5_START + (_nr))

#define EXYNOS4_GPY6(_nr)	(EXYNOS4_GPIO_Y6_START + (_nr))

#define EXYNOS4_GPZ(_nr)	(EXYNOS4_GPIO_Z_START + (_nr))



/* the end of the EXYNOS4 specific gpios */