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Commit 47918b2b authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
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Merge "disp: msm: sde: update uidle wd timer load value and fal1 threshold"

parents 6d1c929a d46c9286

msm/sde/sde_hw_catalog.c

+1 −1
Original line number Diff line number Diff line
@@ -149,7 +149,7 @@ 
#define SDE_UIDLE_FAL10_EXIT_DANGER 4

#define SDE_UIDLE_FAL10_DANGER 6

#define SDE_UIDLE_FAL10_TARGET_IDLE 50

#define SDE_UIDLE_FAL1_TARGET_IDLE 10

#define SDE_UIDLE_FAL1_TARGET_IDLE 40

#define SDE_UIDLE_FAL10_THRESHOLD_60 12

#define SDE_UIDLE_FAL10_THRESHOLD_90 13

#define SDE_UIDLE_MAX_DWNSCALE 1500

msm/sde/sde_hw_uidle.h

+1 −1
Original line number Diff line number Diff line
@@ -23,7 +23,7 @@ struct sde_hw_uidle; 


#define SDE_UIDLE_WD_GRANULARITY 1

#define SDE_UIDLE_WD_HEART_BEAT 0

#define SDE_UIDLE_WD_LOAD_VAL 12

#define SDE_UIDLE_WD_LOAD_VAL 18



struct sde_uidle_ctl_cfg {

	u32 fal10_exit_cnt;

msm/sde/sde_plane.c

+4 −2
Original line number Diff line number Diff line
@@ -2861,6 +2861,7 @@ static void _sde_plane_setup_uidle(struct drm_crtc *crtc, 
{

	struct sde_hw_pipe_uidle_cfg cfg;

	struct sde_crtc *sde_crtc = to_sde_crtc(crtc);

	u32 fal1_threshold_max = 15;



	u32 line_time = sde_get_linetime(&crtc->mode,

			sde_crtc->src_bpp, sde_crtc->target_bpp); /* nS */
@@ -2876,8 +2877,9 @@ static void _sde_plane_setup_uidle(struct drm_crtc *crtc, 
		cfg.enable = _sde_plane_allow_uidle(psde, src, dst);

		cfg.fal10_threshold = fal10_threshold;

		cfg.fal10_exit_threshold = fal10_threshold + 2;

		cfg.fal1_threshold = 1 +

			(fal1_target_idle_time_ns*1000/line_time*2)/1000;

		cfg.fal1_threshold = min(1 +

			(fal1_target_idle_time_ns*1000/line_time*2)/1000,

			fal1_threshold_max);

		cfg.fal_allowed_threshold = fal10_threshold +

			(fal10_target_idle_time_ns*1000/line_time*2)/1000;

	} else {