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Commit 473e0ecb authored by Ilya Bakoulin's avatar Ilya Bakoulin Committed by Alex Deucher
Browse files

drm/amd/display: Fixes for some MPO cases 



[Why]
Alpha could be improperly applied (only affecting half the
frame) for some source pixel formats.

[How]
Change how alpha is enabled in MPC/DPP LB and change the
bottom plane blend mode in MPC.

Signed-off-by: default avatarIlya Bakoulin <Ilya.Bakoulin@amd.com>
Reviewed-by: default avatarDmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: default avatarLeo Li <sunpeng.li@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 8bee5c5c

drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mpc.c

+1 −1
Original line number Diff line number Diff line
@@ -211,7 +211,7 @@ struct mpcc *mpc1_insert_plane( 
	} else {

		new_mpcc->mpcc_bot = NULL;

		REG_SET(MPCC_BOT_SEL[mpcc_id], 0, MPCC_BOT_SEL, 0xf);

		REG_UPDATE(MPCC_CONTROL[mpcc_id], MPCC_MODE, MPCC_BLEND_MODE_TOP_LAYER_PASSTHROUGH);

		REG_UPDATE(MPCC_CONTROL[mpcc_id], MPCC_MODE, MPCC_BLEND_MODE_TOP_LAYER_ONLY);

	}

	REG_SET(MPCC_TOP_SEL[mpcc_id], 0, MPCC_TOP_SEL, dpp_id);

	REG_SET(MPCC_OPP_ID[mpcc_id], 0, MPCC_OPP_ID, tree->opp_id);

drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c

+1 −1
Original line number Diff line number Diff line
@@ -1863,7 +1863,7 @@ static void dcn20_update_mpcc(struct dc *dc, struct pipe_ctx *pipe_ctx) 
{

	struct hubp *hubp = pipe_ctx->plane_res.hubp;

	struct mpcc_blnd_cfg blnd_cfg = { {0} };

	bool per_pixel_alpha = pipe_ctx->plane_state->per_pixel_alpha && pipe_ctx->bottom_pipe;

	bool per_pixel_alpha = pipe_ctx->plane_state->per_pixel_alpha;

	int mpcc_id;

	struct mpcc *new_mpcc;

	struct mpc *mpc = dc->res_pool->mpc;