Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 469f70ba authored by Shaik Sajida Bhanu's avatar Shaik Sajida Bhanu
Browse files

mmc: cqhci: Enable ICE error interrupts



Enable general and invalid crypto error encounterd with command
queue engine during data transfer.

Change-Id: Idfaefcc44ece3144896619d6426bfc70eb4cc2cf
Signed-off-by: default avatarShaik Sajida Bhanu <sbhanu@codeaurora.org>
parent 4cf5de75
Loading
Loading
Loading
Loading
+7 −2
Original line number Diff line number Diff line
@@ -759,17 +759,22 @@ static void cqhci_finish_mrq(struct mmc_host *mmc, unsigned int tag)
irqreturn_t cqhci_irq(struct mmc_host *mmc, u32 intmask, int cmd_error,
		      int data_error)
{
	u32 status;
	u32 status, ice_err;
	unsigned long tag = 0, comp_status;
	struct cqhci_host *cq_host = mmc->cqe_private;

	status = cqhci_readl(cq_host, CQHCI_IS);
	cqhci_writel(cq_host, status, CQHCI_IS);
	ice_err = status & (CQHCI_IS_GCE | CQHCI_IS_ICCE);

	pr_debug("%s: cqhci: IRQ status: 0x%08x\n", mmc_hostname(mmc), status);

	if ((status & CQHCI_IS_RED) || cmd_error || data_error)
	if ((status & CQHCI_IS_RED) || cmd_error || data_error || ice_err) {
#if defined(CONFIG_SDC_QTI)
		mmc->need_hw_reset = true;
#endif
		cqhci_error_irq(mmc, status, cmd_error, data_error);
	}

	if (status & CQHCI_IS_TCC) {
		/* read TCN and complete the request */
+4 −1
Original line number Diff line number Diff line
@@ -39,8 +39,11 @@
#define CQHCI_IS_TCC			BIT(1)
#define CQHCI_IS_RED			BIT(2)
#define CQHCI_IS_TCL			BIT(3)
#define CQHCI_IS_GCE			BIT(4)
#define CQHCI_IS_ICCE			BIT(5)

#define CQHCI_IS_MASK (CQHCI_IS_TCC | CQHCI_IS_RED)
#define CQHCI_IS_MASK (CQHCI_IS_TCC | CQHCI_IS_RED | \
			CQHCI_IS_GCE | CQHCI_IS_ICCE)

/* interrupt status enable */
#define CQHCI_ISTE			0x14
+3 −0
Original line number Diff line number Diff line
@@ -574,6 +574,9 @@ struct mmc_host {

	/* Host Software Queue support */
	bool			hsq_enabled;
#if defined(CONFIG_SDC_QTI)
	bool                    need_hw_reset;
#endif

#if defined(CONFIG_SDC_QTI)
	atomic_t active_reqs;