Merge branches 'x86/apic', 'x86/asm', 'x86/fixmap', 'x86/memtest', 'x86/mm',... (467c88fe) · Commits · e / devices / android_kernel_fairphone_FP5

Documentation/filesystems/squashfs.txt

+1 −1

Original line number	Original line	Diff line number	Diff line
	@@ -22,7 +22,7 @@ Squashfs filesystem features versus Cramfs:

	Squashfs Cramfs		Squashfs Cramfs

	Max filesystem size: 2^64 16 MiB		Max filesystem size: 2^64 256 MiB
	Max file size: ~ 2 TiB 16 MiB		Max file size: ~ 2 TiB 16 MiB
	Max files: unlimited unlimited		Max files: unlimited unlimited
	Max directories: unlimited unlimited		Max directories: unlimited unlimited

arch/arm/mach-at91/at91sam9263_devices.c

+105 −0

Original line number	Original line	Diff line number	Diff line
	@@ -347,6 +347,111 @@ void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
	void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {}		void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {}
	#endif		#endif

			/* --------------------------------------------------------------------
			* Compact Flash (PCMCIA or IDE)
			* -------------------------------------------------------------------- */

			#if defined(CONFIG_AT91_CF) \|\| defined(CONFIG_AT91_CF_MODULE) \|\| \
			defined(CONFIG_BLK_DEV_IDE_AT91) \|\| defined(CONFIG_BLK_DEV_IDE_AT91_MODULE)

			static struct at91_cf_data cf0_data;

			static struct resource cf0_resources[] = {
			[0] = {
			.start = AT91_CHIPSELECT_4,
			.end = AT91_CHIPSELECT_4 + SZ_256M - 1,
			.flags = IORESOURCE_MEM \| IORESOURCE_MEM_8AND16BIT,
			}
			};

			static struct platform_device cf0_device = {
			.id = 0,
			.dev = {
			.platform_data = &cf0_data,
			},
			.resource = cf0_resources,
			.num_resources = ARRAY_SIZE(cf0_resources),
			};

			static struct at91_cf_data cf1_data;

			static struct resource cf1_resources[] = {
			[0] = {
			.start = AT91_CHIPSELECT_5,
			.end = AT91_CHIPSELECT_5 + SZ_256M - 1,
			.flags = IORESOURCE_MEM \| IORESOURCE_MEM_8AND16BIT,
			}
			};

			static struct platform_device cf1_device = {
			.id = 1,
			.dev = {
			.platform_data = &cf1_data,
			},
			.resource = cf1_resources,
			.num_resources = ARRAY_SIZE(cf1_resources),
			};

			void __init at91_add_device_cf(struct at91_cf_data *data)
			{
			unsigned long ebi0_csa;
			struct platform_device *pdev;

			if (!data)
			return;

			/*
			* assign CS4 or CS5 to SMC with Compact Flash logic support,
			* we assume SMC timings are configured by board code,
			* except True IDE where timings are controlled by driver
			*/
			ebi0_csa = at91_sys_read(AT91_MATRIX_EBI0CSA);
			switch (data->chipselect) {
			case 4:
			at91_set_A_periph(AT91_PIN_PD6, 0); /* EBI0_NCS4/CFCS0 */
			ebi0_csa \|= AT91_MATRIX_EBI0_CS4A_SMC_CF1;
			cf0_data = *data;
			pdev = &cf0_device;
			break;
			case 5:
			at91_set_A_periph(AT91_PIN_PD7, 0); /* EBI0_NCS5/CFCS1 */
			ebi0_csa \|= AT91_MATRIX_EBI0_CS5A_SMC_CF2;
			cf1_data = *data;
			pdev = &cf1_device;
			break;
			default:
			printk(KERN_ERR "AT91 CF: bad chip-select requested (%u)\n",
			data->chipselect);
			return;
			}
			at91_sys_write(AT91_MATRIX_EBI0CSA, ebi0_csa);

			if (data->det_pin) {
			at91_set_gpio_input(data->det_pin, 1);
			at91_set_deglitch(data->det_pin, 1);
			}

			if (data->irq_pin) {
			at91_set_gpio_input(data->irq_pin, 1);
			at91_set_deglitch(data->irq_pin, 1);
			}

			if (data->vcc_pin)
			/* initially off */
			at91_set_gpio_output(data->vcc_pin, 0);

			/* enable EBI controlled pins */
			at91_set_A_periph(AT91_PIN_PD5, 1); /* NWAIT */
			at91_set_A_periph(AT91_PIN_PD8, 0); /* CFCE1 */
			at91_set_A_periph(AT91_PIN_PD9, 0); /* CFCE2 */
			at91_set_A_periph(AT91_PIN_PD14, 0); /* CFNRW */

			pdev->name = (data->flags & AT91_CF_TRUE_IDE) ? "at91_ide" : "at91_cf";
			platform_device_register(pdev);
			}
			#else
			void __init at91_add_device_cf(struct at91_cf_data *data) {}
			#endif

	/* --------------------------------------------------------------------		/* --------------------------------------------------------------------
	* NAND / SmartMedia		* NAND / SmartMedia

arch/arm/mach-at91/include/mach/board.h

+3 −0

Original line number	Original line	Diff line number	Diff line
	@@ -56,6 +56,9 @@ struct at91_cf_data {
	u8 vcc_pin; /* power switching */		u8 vcc_pin; /* power switching */
	u8 rst_pin; /* card reset */		u8 rst_pin; /* card reset */
	u8 chipselect; /* EBI Chip Select number */		u8 chipselect; /* EBI Chip Select number */
			u8 flags;
			#define AT91_CF_TRUE_IDE 0x01
			#define AT91_IDE_SWAP_A0_A2 0x02
	};		};
	extern void __init at91_add_device_cf(struct at91_cf_data *data);		extern void __init at91_add_device_cf(struct at91_cf_data *data);

arch/blackfin/Kconfig

+7 −0

Original line number	Original line	Diff line number	Diff line
	@@ -1129,6 +1129,7 @@ endchoice

	config PM_WAKEUP_BY_GPIO		config PM_WAKEUP_BY_GPIO
	bool "Allow Wakeup from Standby by GPIO"		bool "Allow Wakeup from Standby by GPIO"
			depends on PM && !BF54x

	config PM_WAKEUP_GPIO_NUMBER		config PM_WAKEUP_GPIO_NUMBER
	int "GPIO number"		int "GPIO number"
	@@ -1168,6 +1169,12 @@ config PM_BFIN_WAKE_GP
	default n		default n
	help		help
	Enable General-Purpose Wake-Up (Voltage Regulator Power-Up)		Enable General-Purpose Wake-Up (Voltage Regulator Power-Up)
			(all processors, except ADSP-BF549). This option sets
			the general-purpose wake-up enable (GPWE) control bit to enable
			wake-up upon detection of an active low signal on the /GPW (PH7) pin.
			On ADSP-BF549 this option enables the the same functionality on the
			/MRXON pin also PH7.

	endmenu		endmenu

	menu "CPU Frequency scaling"		menu "CPU Frequency scaling"

arch/blackfin/Kconfig.debug

+0 −6

Original line number	Original line	Diff line number	Diff line
	@@ -21,12 +21,6 @@ config DEBUG_STACK_USAGE
	config HAVE_ARCH_KGDB		config HAVE_ARCH_KGDB
	def_bool y		def_bool y

	config KGDB_TESTCASE
	tristate "KGDB: for test case in expect"
	default n
	help
	This is a kgdb test case for automated testing.

	config DEBUG_VERBOSE		config DEBUG_VERBOSE
	bool "Verbose fault messages"		bool "Verbose fault messages"
	default y		default y