Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 46084bc2 authored by Suzuki K Poulose's avatar Suzuki K Poulose Committed by Will Deacon
Browse files

arm64: insn: Add helpers for adrp offsets 



Adds helpers for decoding/encoding the PC relative addresses for adrp.
This will be used for handling dynamic patching of 'adrp' instructions
in alternative code patching.

Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: default avatarSuzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
parent baa763b5

arch/arm64/include/asm/insn.h

+10 −1
Original line number Diff line number Diff line
@@ -246,7 +246,8 @@ static __always_inline bool aarch64_insn_is_##abbr(u32 code) \ 
static __always_inline u32 aarch64_insn_get_##abbr##_value(void) \

{ return (val); }



__AARCH64_INSN_FUNCS(adr_adrp,	0x1F000000, 0x10000000)

__AARCH64_INSN_FUNCS(adr,	0x9F000000, 0x10000000)

__AARCH64_INSN_FUNCS(adrp,	0x9F000000, 0x90000000)

__AARCH64_INSN_FUNCS(prfm_lit,	0xFF000000, 0xD8000000)

__AARCH64_INSN_FUNCS(str_reg,	0x3FE0EC00, 0x38206800)

__AARCH64_INSN_FUNCS(ldr_reg,	0x3FE0EC00, 0x38606800)
@@ -318,6 +319,11 @@ __AARCH64_INSN_FUNCS(msr_reg, 0xFFF00000, 0xD5100000) 
bool aarch64_insn_is_nop(u32 insn);

bool aarch64_insn_is_branch_imm(u32 insn);



static inline bool aarch64_insn_is_adr_adrp(u32 insn)

{

	return aarch64_insn_is_adr(insn) || aarch64_insn_is_adrp(insn);

}



int aarch64_insn_read(void *addr, u32 *insnp);

int aarch64_insn_write(void *addr, u32 insn);

enum aarch64_insn_encoding_class aarch64_get_insn_class(u32 insn);
@@ -398,6 +404,9 @@ int aarch64_insn_patch_text_nosync(void *addr, u32 insn); 
int aarch64_insn_patch_text_sync(void *addrs[], u32 insns[], int cnt);

int aarch64_insn_patch_text(void *addrs[], u32 insns[], int cnt);



s32 aarch64_insn_adrp_get_offset(u32 insn);

u32 aarch64_insn_adrp_set_offset(u32 insn, s32 offset);



bool aarch32_insn_is_wide(u32 insn);



#define A32_RN_OFFSET	16

arch/arm64/kernel/insn.c

+13 −0
Original line number Diff line number Diff line
@@ -1202,6 +1202,19 @@ u32 aarch64_set_branch_offset(u32 insn, s32 offset) 
	BUG();

}



s32 aarch64_insn_adrp_get_offset(u32 insn)

{

	BUG_ON(!aarch64_insn_is_adrp(insn));

	return aarch64_insn_decode_immediate(AARCH64_INSN_IMM_ADR, insn) << 12;

}



u32 aarch64_insn_adrp_set_offset(u32 insn, s32 offset)

{

	BUG_ON(!aarch64_insn_is_adrp(insn));

	return aarch64_insn_encode_immediate(AARCH64_INSN_IMM_ADR, insn,

						offset >> 12);

}



/*

 * Extract the Op/CR data from a msr/mrs instruction.

 */