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Commit 45ea8f32 authored by Niklas Cassel's avatar Niklas Cassel Committed by Andy Gross
Browse files

arm64: dts: qcom: qcs404: Add PSCI cpuidle low power states 



Add device bindings for cpuidle states for cpu devices.

Acked-by: default avatarDaniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: default avatarVinod Koul <vkoul@kernel.org>
Signed-off-by: default avatarNiklas Cassel <niklas.cassel@linaro.org>
[amit: rename the idle-states to more generic names and fixups]
Signed-off-by: default avatarAmit Kucheria <amit.kucheria@linaro.org>
Signed-off-by: default avatarBjorn Andersson <bjorn.andersson@linaro.org>

Signed-off-by: default avatarAndy Gross <agross@kernel.org>
parent 3fdeaee9

arch/arm64/boot/dts/qcom/qcs404.dtsi

+18 −0
Original line number Diff line number Diff line
@@ -30,6 +30,7 @@ 
			compatible = "arm,cortex-a53";

			reg = <0x100>;

			enable-method = "psci";

			cpu-idle-states = <&CPU_SLEEP_0>;

			next-level-cache = <&L2_0>;

		};
@@ -38,6 +39,7 @@ 
			compatible = "arm,cortex-a53";

			reg = <0x101>;

			enable-method = "psci";

			cpu-idle-states = <&CPU_SLEEP_0>;

			next-level-cache = <&L2_0>;

		};
@@ -46,6 +48,7 @@ 
			compatible = "arm,cortex-a53";

			reg = <0x102>;

			enable-method = "psci";

			cpu-idle-states = <&CPU_SLEEP_0>;

			next-level-cache = <&L2_0>;

		};
@@ -54,6 +57,7 @@ 
			compatible = "arm,cortex-a53";

			reg = <0x103>;

			enable-method = "psci";

			cpu-idle-states = <&CPU_SLEEP_0>;

			next-level-cache = <&L2_0>;

		};
@@ -61,6 +65,20 @@ 
			compatible = "cache";

			cache-level = <2>;

		};



		idle-states {

			entry-method = "psci";



			CPU_SLEEP_0: cpu-sleep-0 {

				compatible = "arm,idle-state";

				idle-state-name = "standalone-power-collapse";

				arm,psci-suspend-param = <0x40000003>;

				entry-latency-us = <125>;

				exit-latency-us = <180>;

				min-residency-us = <595>;

				local-timer-stop;

			};

		};

	};



	firmware {