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Commit 45d85146 authored by Mauro Carvalho Chehab's avatar Mauro Carvalho Chehab Committed by Jonathan Corbet
Browse files

Intel-IOMMU.txt: standardize document format 



Each text file under Documentation follows a different
format. Some doesn't even have titles!

Change its representation to follow the adopted standard,
using ReST markups for it to be parseable by Sphinx:

This file is almost in the right format. It only needed to
convert a list to bulleted list and to use the right markup
for literal blocks.

Signed-off-by: default avatarMauro Carvalho Chehab <mchehab@s-opensource.com>
Signed-off-by: default avatarJonathan Corbet <corbet@lwn.net>
parent 7e18c07e

Documentation/Intel-IOMMU.txt

+20 −17
Original line number Diff line number Diff line 
===================

Linux IOMMU Support

===================
@@ -9,11 +10,11 @@ This guide gives a quick cheat sheet for some basic understanding. 


Some Keywords



DMAR - DMA remapping

DRHD - DMA Remapping Hardware Unit Definition

RMRR - Reserved memory Region Reporting Structure

ZLR  - Zero length reads from PCI devices

IOVA - IO Virtual address.

- DMAR - DMA remapping

- DRHD - DMA Remapping Hardware Unit Definition

- RMRR - Reserved memory Region Reporting Structure

- ZLR  - Zero length reads from PCI devices

- IOVA - IO Virtual address.



Basic stuff

-----------
@@ -33,7 +34,7 @@ devices that need to access these regions. OS is expected to setup 
unity mappings for these regions for these devices to access these regions.



How is IOVA generated?

---------------------

----------------------



Well behaved drivers call pci_map_*() calls before sending command to device

that needs to perform DMA. Once DMA is completed and mapping is no longer
@@ -82,7 +83,7 @@ in ACPI. 
ACPI: DMAR (v001 A M I  OEMDMAR  0x00000001 MSFT 0x00000097) @ 0x000000007f5b5ef0



When DMAR is being processed and initialized by ACPI, prints DMAR locations

and any RMRR's processed.

and any RMRR's processed::



	ACPI DMAR:Host address width 36

	ACPI DMAR:DRHD (flags: 0x00000000)base: 0x00000000fed90000
@@ -98,6 +99,8 @@ PCI-DMA: Using DMAR IOMMU 
Fault reporting

---------------



::



	DMAR:[DMA Write] Request device [00:02.0] fault addr 6df084000

	DMAR:[fault reason 05] PTE Write access is not set

	DMAR:[DMA Write] Request device [00:02.0] fault addr 6df084000