Loading drivers/irqchip/qcom-pdc.c +2 −0 Original line number Diff line number Diff line Loading @@ -554,6 +554,7 @@ static int qcom_pdc_probe(struct platform_device *pdev) static const struct of_device_id qcom_pdc_match_table[] = { { .compatible = "qcom,lahaina-pdc" }, { .compatible = "qcom,shima-pdc" }, { .compatible = "qcom,yupik-pdc" }, {} }; MODULE_DEVICE_TABLE(of, qcom_pdc_match_table); Loading @@ -570,6 +571,7 @@ module_platform_driver(qcom_pdc_driver); IRQCHIP_DECLARE(qcom_pdc, "qcom,pdc", qcom_pdc_init); IRQCHIP_DECLARE(pdc_lahaina, "qcom,lahaina-pdc", qcom_pdc_init); IRQCHIP_DECLARE(pdc_shima, "qcom,shima-pdc", qcom_pdc_init); IRQCHIP_DECLARE(pdc_yupik, "qcom,yupik-pdc", qcom_pdc_init); IRQCHIP_DECLARE(pdc_sdxlemur, "qcom,sdxlemur-pdc", qcom_pdc_init); #endif Loading drivers/pinctrl/qcom/pinctrl-yupik.c +24 −0 Original line number Diff line number Diff line Loading @@ -1798,6 +1798,28 @@ static struct pinctrl_qup yupik_qup_regs[] = { QUP_I3C(9, QUP_I3C_9_MODE_OFFSET), }; static const struct msm_gpio_wakeirq_map yupik_pdc_map[] = { { 0, 134 }, { 3, 131 }, { 4, 121 }, { 7, 103 }, { 8, 155 }, { 11, 93 }, { 12, 78 }, { 15, 79 }, { 16, 80 }, { 18, 81 }, { 19, 107 }, { 20, 82 }, { 21, 83 }, { 23, 99 }, { 24, 86 }, { 25, 95 }, { 27, 158 }, { 28, 159 }, { 31, 90 }, { 32, 144 }, { 34, 77 }, { 35, 92 }, { 36, 157 }, { 39, 73 }, { 40, 97 }, { 41, 98 }, { 43, 85 }, { 44, 100 }, { 45, 101 }, { 47, 102 }, { 48, 75 }, { 51, 112 }, { 52, 156 }, { 54, 117 }, { 55, 84 }, { 56, 108 }, { 59, 110 }, { 60, 111 }, { 61, 123 }, { 63, 104 }, { 68, 127 }, { 72, 150 }, { 75, 133 }, { 77, 125 }, { 78, 105 }, { 79, 106 }, { 80, 118 }, { 81, 119 }, { 82, 162 }, { 83, 122 }, { 86, 74 }, { 88, 154 }, { 89, 124 }, { 90, 149 }, { 91, 76 }, { 93, 128 }, { 95, 160 }, { 101, 126 }, { 102, 96 }, { 103, 116 }, { 104, 114 }, { 112, 72 }, { 116, 135 }, { 117, 163 }, { 119, 137 }, { 121, 138 }, { 123, 139 }, { 125, 140 }, { 127, 141 }, { 128, 165 }, { 129, 143 }, { 130, 94 }, { 131, 145 }, { 133, 146 }, { 136, 147 }, { 140, 148 }, { 141, 115 }, { 142, 113 }, { 145, 130 }, { 148, 132 }, { 150, 87 }, { 151, 88 }, { 153, 89 }, { 155, 164 }, { 156, 129 }, { 157, 161 }, { 158, 120 }, { 161, 136 }, { 163, 142 }, { 172, 166 }, { 174, 167 }, }; static const struct msm_pinctrl_soc_data yupik_pinctrl = { .pins = yupik_pins, .npins = ARRAY_SIZE(yupik_pins), Loading @@ -1808,6 +1830,8 @@ static const struct msm_pinctrl_soc_data yupik_pinctrl = { .ngpios = 176, .qup_regs = yupik_qup_regs, .nqup_regs = ARRAY_SIZE(yupik_qup_regs), .wakeirq_map = yupik_pdc_map, .nwakeirq_map = ARRAY_SIZE(yupik_pdc_map), }; static int yupik_pinctrl_probe(struct platform_device *pdev) Loading Loading
drivers/irqchip/qcom-pdc.c +2 −0 Original line number Diff line number Diff line Loading @@ -554,6 +554,7 @@ static int qcom_pdc_probe(struct platform_device *pdev) static const struct of_device_id qcom_pdc_match_table[] = { { .compatible = "qcom,lahaina-pdc" }, { .compatible = "qcom,shima-pdc" }, { .compatible = "qcom,yupik-pdc" }, {} }; MODULE_DEVICE_TABLE(of, qcom_pdc_match_table); Loading @@ -570,6 +571,7 @@ module_platform_driver(qcom_pdc_driver); IRQCHIP_DECLARE(qcom_pdc, "qcom,pdc", qcom_pdc_init); IRQCHIP_DECLARE(pdc_lahaina, "qcom,lahaina-pdc", qcom_pdc_init); IRQCHIP_DECLARE(pdc_shima, "qcom,shima-pdc", qcom_pdc_init); IRQCHIP_DECLARE(pdc_yupik, "qcom,yupik-pdc", qcom_pdc_init); IRQCHIP_DECLARE(pdc_sdxlemur, "qcom,sdxlemur-pdc", qcom_pdc_init); #endif Loading
drivers/pinctrl/qcom/pinctrl-yupik.c +24 −0 Original line number Diff line number Diff line Loading @@ -1798,6 +1798,28 @@ static struct pinctrl_qup yupik_qup_regs[] = { QUP_I3C(9, QUP_I3C_9_MODE_OFFSET), }; static const struct msm_gpio_wakeirq_map yupik_pdc_map[] = { { 0, 134 }, { 3, 131 }, { 4, 121 }, { 7, 103 }, { 8, 155 }, { 11, 93 }, { 12, 78 }, { 15, 79 }, { 16, 80 }, { 18, 81 }, { 19, 107 }, { 20, 82 }, { 21, 83 }, { 23, 99 }, { 24, 86 }, { 25, 95 }, { 27, 158 }, { 28, 159 }, { 31, 90 }, { 32, 144 }, { 34, 77 }, { 35, 92 }, { 36, 157 }, { 39, 73 }, { 40, 97 }, { 41, 98 }, { 43, 85 }, { 44, 100 }, { 45, 101 }, { 47, 102 }, { 48, 75 }, { 51, 112 }, { 52, 156 }, { 54, 117 }, { 55, 84 }, { 56, 108 }, { 59, 110 }, { 60, 111 }, { 61, 123 }, { 63, 104 }, { 68, 127 }, { 72, 150 }, { 75, 133 }, { 77, 125 }, { 78, 105 }, { 79, 106 }, { 80, 118 }, { 81, 119 }, { 82, 162 }, { 83, 122 }, { 86, 74 }, { 88, 154 }, { 89, 124 }, { 90, 149 }, { 91, 76 }, { 93, 128 }, { 95, 160 }, { 101, 126 }, { 102, 96 }, { 103, 116 }, { 104, 114 }, { 112, 72 }, { 116, 135 }, { 117, 163 }, { 119, 137 }, { 121, 138 }, { 123, 139 }, { 125, 140 }, { 127, 141 }, { 128, 165 }, { 129, 143 }, { 130, 94 }, { 131, 145 }, { 133, 146 }, { 136, 147 }, { 140, 148 }, { 141, 115 }, { 142, 113 }, { 145, 130 }, { 148, 132 }, { 150, 87 }, { 151, 88 }, { 153, 89 }, { 155, 164 }, { 156, 129 }, { 157, 161 }, { 158, 120 }, { 161, 136 }, { 163, 142 }, { 172, 166 }, { 174, 167 }, }; static const struct msm_pinctrl_soc_data yupik_pinctrl = { .pins = yupik_pins, .npins = ARRAY_SIZE(yupik_pins), Loading @@ -1808,6 +1830,8 @@ static const struct msm_pinctrl_soc_data yupik_pinctrl = { .ngpios = 176, .qup_regs = yupik_qup_regs, .nqup_regs = ARRAY_SIZE(yupik_qup_regs), .wakeirq_map = yupik_pdc_map, .nwakeirq_map = ARRAY_SIZE(yupik_pdc_map), }; static int yupik_pinctrl_probe(struct platform_device *pdev) Loading