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Commit 4461f41e authored by Arnd Bergmann's avatar Arnd Bergmann Committed by Greg Kroah-Hartman
Browse files

clk: tegra20: fix gcc-7 constant overflow warning 



[ Upstream commit b4a2adbf3586efa12fe78b9dec047423e01f3010 ]

Older gcc versions get confused by comparing a u32 value to a negative
constant in a switch()/case block:

drivers/clk/tegra/clk-tegra20.c: In function 'tegra20_clk_measure_input_freq':
drivers/clk/tegra/clk-tegra20.c:581:2: error: case label does not reduce to an integer constant
  case OSC_CTRL_OSC_FREQ_12MHZ:
  ^~~~
drivers/clk/tegra/clk-tegra20.c:593:2: error: case label does not reduce to an integer constant
  case OSC_CTRL_OSC_FREQ_26MHZ:

Make the constants unsigned instead.

Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
Link: https://lore.kernel.org/r/20230227085914.2560984-1-arnd@kernel.org


Signed-off-by: default avatarStephen Boyd <sboyd@kernel.org>
Signed-off-by: default avatarSasha Levin <sashal@kernel.org>
parent c23e6383

drivers/clk/tegra/clk-tegra20.c

+14 −14
Original line number Diff line number Diff line
@@ -18,24 +18,24 @@ 
#define MISC_CLK_ENB 0x48



#define OSC_CTRL 0x50

#define OSC_CTRL_OSC_FREQ_MASK (3<<30)

#define OSC_CTRL_OSC_FREQ_13MHZ (0<<30)

#define OSC_CTRL_OSC_FREQ_19_2MHZ (1<<30)

#define OSC_CTRL_OSC_FREQ_12MHZ (2<<30)

#define OSC_CTRL_OSC_FREQ_26MHZ (3<<30)

#define OSC_CTRL_MASK (0x3f2 | OSC_CTRL_OSC_FREQ_MASK)



#define OSC_CTRL_PLL_REF_DIV_MASK (3<<28)

#define OSC_CTRL_PLL_REF_DIV_1		(0<<28)

#define OSC_CTRL_PLL_REF_DIV_2		(1<<28)

#define OSC_CTRL_PLL_REF_DIV_4		(2<<28)

#define OSC_CTRL_OSC_FREQ_MASK (3u<<30)

#define OSC_CTRL_OSC_FREQ_13MHZ (0u<<30)

#define OSC_CTRL_OSC_FREQ_19_2MHZ (1u<<30)

#define OSC_CTRL_OSC_FREQ_12MHZ (2u<<30)

#define OSC_CTRL_OSC_FREQ_26MHZ (3u<<30)

#define OSC_CTRL_MASK (0x3f2u | OSC_CTRL_OSC_FREQ_MASK)



#define OSC_CTRL_PLL_REF_DIV_MASK	(3u<<28)

#define OSC_CTRL_PLL_REF_DIV_1		(0u<<28)

#define OSC_CTRL_PLL_REF_DIV_2		(1u<<28)

#define OSC_CTRL_PLL_REF_DIV_4		(2u<<28)



#define OSC_FREQ_DET 0x58

#define OSC_FREQ_DET_TRIG (1<<31)

#define OSC_FREQ_DET_TRIG (1u<<31)



#define OSC_FREQ_DET_STATUS 0x5c

#define OSC_FREQ_DET_BUSY (1<<31)

#define OSC_FREQ_DET_CNT_MASK 0xFFFF

#define OSC_FREQ_DET_BUSYu (1<<31)

#define OSC_FREQ_DET_CNT_MASK 0xFFFFu



#define TEGRA20_CLK_PERIPH_BANKS	3