Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 43e0f873 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge branch 'drm-next-4.20' of git://people.freedesktop.org/~agd5f/linux into drm-next



- Fix flickering at low backlight levels on some systems
- Fix some overclocking regressions
- Vega20 updates for
- GPU recovery fixes
- Disable gfxoff on RV as some sbios/fw combinations are not stable yet

Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
From: Alex Deucher <alexdeucher@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181101151939.2828-1-alexander.deucher@amd.com
parents 52b50ae1 9d064be1
Loading
Loading
Loading
Loading
+4 −2
Original line number Diff line number Diff line
@@ -135,7 +135,8 @@ static int acp_poweroff(struct generic_pm_domain *genpd)
	 * 2. power off the acp tiles
	 * 3. check and enter ulv state
	 */
		if (adev->powerplay.pp_funcs->set_powergating_by_smu)
		if (adev->powerplay.pp_funcs &&
			adev->powerplay.pp_funcs->set_powergating_by_smu)
			amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_ACP, true);
	}
	return 0;
@@ -517,7 +518,8 @@ static int acp_set_powergating_state(void *handle,
	struct amdgpu_device *adev = (struct amdgpu_device *)handle;
	bool enable = state == AMD_PG_STATE_GATE ? true : false;

	if (adev->powerplay.pp_funcs->set_powergating_by_smu)
	if (adev->powerplay.pp_funcs &&
		adev->powerplay.pp_funcs->set_powergating_by_smu)
		amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_ACP, enable);

	return 0;
+2 −4
Original line number Diff line number Diff line
@@ -1493,8 +1493,6 @@ static int amdgpu_device_ip_early_init(struct amdgpu_device *adev)
	}

	adev->powerplay.pp_feature = amdgpu_pp_feature_mask;
	if (amdgpu_sriov_vf(adev))
		adev->powerplay.pp_feature &= ~PP_GFXOFF_MASK;

	for (i = 0; i < adev->num_ip_blocks; i++) {
		if ((amdgpu_ip_block_mask & (1 << i)) == 0) {
@@ -1600,7 +1598,7 @@ static int amdgpu_device_fw_loading(struct amdgpu_device *adev)
		}
	}

	if (adev->powerplay.pp_funcs->load_firmware) {
	if (adev->powerplay.pp_funcs && adev->powerplay.pp_funcs->load_firmware) {
		r = adev->powerplay.pp_funcs->load_firmware(adev->powerplay.pp_handle);
		if (r) {
			pr_err("firmware loading failed\n");
@@ -3341,7 +3339,7 @@ int amdgpu_device_gpu_recover(struct amdgpu_device *adev,

		kthread_park(ring->sched.thread);

		if (job && job->base.sched == &ring->sched)
		if (job && job->base.sched != &ring->sched)
			continue;

		drm_sched_hw_job_reset(&ring->sched, job ? &job->base : NULL);
+2 −2
Original line number Diff line number Diff line
@@ -114,8 +114,8 @@ uint amdgpu_pg_mask = 0xffffffff;
uint amdgpu_sdma_phase_quantum = 32;
char *amdgpu_disable_cu = NULL;
char *amdgpu_virtual_display = NULL;
/* OverDrive(bit 14) disabled by default*/
uint amdgpu_pp_feature_mask = 0xffffbfff;
/* OverDrive(bit 14),gfxoff(bit 15),stutter mode(bit 17) disabled by default*/
uint amdgpu_pp_feature_mask = 0xfffd3fff;
int amdgpu_ngg = 0;
int amdgpu_prim_buf_per_se = 0;
int amdgpu_pos_buf_per_se = 0;
+1 −1
Original line number Diff line number Diff line
@@ -392,7 +392,7 @@ void amdgpu_gfx_off_ctrl(struct amdgpu_device *adev, bool enable)
	if (!(adev->powerplay.pp_feature & PP_GFXOFF_MASK))
		return;

	if (!adev->powerplay.pp_funcs->set_powergating_by_smu)
	if (!adev->powerplay.pp_funcs || !adev->powerplay.pp_funcs->set_powergating_by_smu)
		return;


+12 −3
Original line number Diff line number Diff line
@@ -704,7 +704,10 @@ static ssize_t amdgpu_set_pp_dpm_sclk(struct device *dev,
		return ret;

	if (adev->powerplay.pp_funcs->force_clock_level)
		amdgpu_dpm_force_clock_level(adev, PP_SCLK, mask);
		ret = amdgpu_dpm_force_clock_level(adev, PP_SCLK, mask);

	if (ret)
		return -EINVAL;

	return count;
}
@@ -737,7 +740,10 @@ static ssize_t amdgpu_set_pp_dpm_mclk(struct device *dev,
		return ret;

	if (adev->powerplay.pp_funcs->force_clock_level)
		amdgpu_dpm_force_clock_level(adev, PP_MCLK, mask);
		ret = amdgpu_dpm_force_clock_level(adev, PP_MCLK, mask);

	if (ret)
		return -EINVAL;

	return count;
}
@@ -770,7 +776,10 @@ static ssize_t amdgpu_set_pp_dpm_pcie(struct device *dev,
		return ret;

	if (adev->powerplay.pp_funcs->force_clock_level)
		amdgpu_dpm_force_clock_level(adev, PP_PCIE, mask);
		ret = amdgpu_dpm_force_clock_level(adev, PP_PCIE, mask);

	if (ret)
		return -EINVAL;

	return count;
}
Loading