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Commit 438a09e1 authored by Ben Dooks's avatar Ben Dooks Committed by Ben Dooks
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ARM: S3C2410: CPUFREQ: Add PLL table 



Add PLL table for the S3C2410 SoC.

Signed-off-by: default avatarBen Dooks <ben@simtec.co.uk>
Signed-off-by: default avatarBen Dooks <ben-linux@fluff.org>
parent a24c091d

arch/arm/mach-s3c2410/Kconfig

+7 −0
Original line number Diff line number Diff line
@@ -55,6 +55,13 @@ config S3C2410_CPUFREQ 
	help

	  CPU Frequency scaling support for S3C2410



config S3C2410_PLLTABLE

	bool

	depends on S3C2410_CPUFREQ && CPU_FREQ_S3C24XX_PLL

	default y

	help

	  Select the PLL table for the S3C2410



menu "S3C2410 Machines"



config ARCH_SMDK2410

arch/arm/mach-s3c2410/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -16,6 +16,7 @@ obj-$(CONFIG_CPU_S3C2410_DMA) += dma.o 
obj-$(CONFIG_S3C2410_PM)	+= pm.o sleep.o

obj-$(CONFIG_S3C2410_GPIO)	+= gpio.o

obj-$(CONFIG_S3C2410_CPUFREQ)	+= cpu-freq.o

obj-$(CONFIG_S3C2410_PLLTABLE)	+= pll.o



# Machine support

arch/arm/mach-s3c2410/pll.c

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+95 −0
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/* arch/arm/mach-s3c2410/pll.c

 *

 * Copyright (c) 2006,2007 Simtec Electronics

 *	http://armlinux.simtec.co.uk/

 *	Ben Dooks <ben@simtec.co.uk>

 *	Vincent Sanders <vince@arm.linux.org.uk>

 *

 * S3C2410 CPU PLL tables

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License as published by

 * the Free Software Foundation; either version 2 of the License, or

 * (at your option) any later version.

 *

 * This program is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 *

 * You should have received a copy of the GNU General Public License

 * along with this program; if not, write to the Free Software

 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA

*/



#include <linux/types.h>

#include <linux/kernel.h>

#include <linux/module.h>

#include <linux/sysdev.h>

#include <linux/list.h>

#include <linux/clk.h>

#include <linux/err.h>



#include <plat/cpu.h>

#include <plat/cpu-freq-core.h>



static struct cpufreq_frequency_table pll_vals_12MHz[] = {

    { .frequency = 34000000,  .index = PLLVAL(82, 2, 3),   },

    { .frequency = 45000000,  .index = PLLVAL(82, 1, 3),   },

    { .frequency = 51000000,  .index = PLLVAL(161, 3, 3),  },

    { .frequency = 48000000,  .index = PLLVAL(120, 2, 3),  },

    { .frequency = 56000000,  .index = PLLVAL(142, 2, 3),  },

    { .frequency = 68000000,  .index = PLLVAL(82, 2, 2),   },

    { .frequency = 79000000,  .index = PLLVAL(71, 1, 2),   },

    { .frequency = 85000000,  .index = PLLVAL(105, 2, 2),  },

    { .frequency = 90000000,  .index = PLLVAL(112, 2, 2),  },

    { .frequency = 101000000, .index = PLLVAL(127, 2, 2),  },

    { .frequency = 113000000, .index = PLLVAL(105, 1, 2),  },

    { .frequency = 118000000, .index = PLLVAL(150, 2, 2),  },

    { .frequency = 124000000, .index = PLLVAL(116, 1, 2),  },

    { .frequency = 135000000, .index = PLLVAL(82, 2, 1),   },

    { .frequency = 147000000, .index = PLLVAL(90, 2, 1),   },

    { .frequency = 152000000, .index = PLLVAL(68, 1, 1),   },

    { .frequency = 158000000, .index = PLLVAL(71, 1, 1),   },

    { .frequency = 170000000, .index = PLLVAL(77, 1, 1),   },

    { .frequency = 180000000, .index = PLLVAL(82, 1, 1),   },

    { .frequency = 186000000, .index = PLLVAL(85, 1, 1),   },

    { .frequency = 192000000, .index = PLLVAL(88, 1, 1),   },

    { .frequency = 203000000, .index = PLLVAL(161, 3, 1),  },



    /* 2410A extras */



    { .frequency = 210000000, .index = PLLVAL(132, 2, 1),  },

    { .frequency = 226000000, .index = PLLVAL(105, 1, 1),  },

    { .frequency = 266000000, .index = PLLVAL(125, 1, 1),  },

    { .frequency = 268000000, .index = PLLVAL(126, 1, 1),  },

    { .frequency = 270000000, .index = PLLVAL(127, 1, 1),  },

};



static int s3c2410_plls_add(struct sys_device *dev)

{

	return s3c_plltab_register(pll_vals_12MHz, ARRAY_SIZE(pll_vals_12MHz));

}



static struct sysdev_driver s3c2410_plls_drv = {

	.add	= s3c2410_plls_add,

};



static int __init s3c2410_pll_init(void)

{

	return sysdev_driver_register(&s3c2410_sysclass, &s3c2410_plls_drv);



}



arch_initcall(s3c2410_pll_init);



static struct sysdev_driver s3c2410a_plls_drv = {

	.add	= s3c2410_plls_add,

};



static int __init s3c2410a_pll_init(void)

{

	return sysdev_driver_register(&s3c2410a_sysclass, &s3c2410a_plls_drv);

}



arch_initcall(s3c2410a_pll_init);