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Commit 437b2296 authored by Ben Skeggs's avatar Ben Skeggs
Browse files

drm/nouveau/volt: convert to new-style nvkm_subdev 



Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
parent 31649ecf

drivers/gpu/drm/nouveau/include/nvkm/subdev/volt.h

+5 −41
Original line number Diff line number Diff line
@@ -2,20 +2,10 @@ 
#define __NVKM_VOLT_H__

#include <core/subdev.h>



struct nvkm_voltage {

	u32 uv;

	u8  id;

};



struct nvkm_volt {

	const struct nvkm_volt_func *func;

	struct nvkm_subdev subdev;



	int (*vid_get)(struct nvkm_volt *);

	int (*get)(struct nvkm_volt *);

	int (*vid_set)(struct nvkm_volt *, u8 vid);

	int (*set)(struct nvkm_volt *, u32 uv);

	int (*set_id)(struct nvkm_volt *, u8 id, int condition);



	u8 vid_mask;

	u8 vid_nr;

	struct {
@@ -24,35 +14,9 @@ struct nvkm_volt { 
	} vid[256];

};



static inline struct nvkm_volt *

nvkm_volt(void *obj)

{

	return (void *)nvkm_subdev(obj, NVDEV_SUBDEV_VOLT);

}



#define nvkm_volt_create(p, e, o, d)                                        \

	nvkm_volt_create_((p), (e), (o), sizeof(**d), (void **)d)

#define nvkm_volt_destroy(p) ({                                             \

	struct nvkm_volt *v = (p);                                          \

	_nvkm_volt_dtor(nv_object(v));                                      \

})

#define nvkm_volt_init(p) ({                                                \

	struct nvkm_volt *v = (p);                                          \

	_nvkm_volt_init(nv_object(v));                                      \

})

#define nvkm_volt_fini(p,s)                                                 \

	nvkm_subdev_fini_old((p), (s))



int  nvkm_volt_create_(struct nvkm_object *, struct nvkm_object *,

			  struct nvkm_oclass *, int, void **);

void _nvkm_volt_dtor(struct nvkm_object *);

int  _nvkm_volt_init(struct nvkm_object *);

#define _nvkm_volt_fini _nvkm_subdev_fini



extern struct nvkm_oclass nv40_volt_oclass;

extern struct nvkm_oclass gk20a_volt_oclass;

int nvkm_volt_get(struct nvkm_volt *);

int nvkm_volt_set_id(struct nvkm_volt *, u8 id, int condition);



int nvkm_voltgpio_init(struct nvkm_volt *);

int nvkm_voltgpio_get(struct nvkm_volt *);

int nvkm_voltgpio_set(struct nvkm_volt *, u8);

int nv40_volt_new(struct nvkm_device *, int, struct nvkm_volt **);

int gk20a_volt_new(struct nvkm_device *, int, struct nvkm_volt **);

#endif

drivers/gpu/drm/nouveau/nvkm/engine/device/base.c

+46 −46
Original line number Diff line number Diff line
@@ -465,7 +465,7 @@ nv40_chipset = { 
	.mmu = nv04_mmu_new,

	.therm = nv40_therm_new,

	.timer = nv40_timer_new,

//	.volt = nv40_volt_new,

	.volt = nv40_volt_new,

//	.disp = nv04_disp_new,

//	.dma = nv04_dma_new,

//	.fifo = nv40_fifo_new,
@@ -490,7 +490,7 @@ nv41_chipset = { 
	.mmu = nv41_mmu_new,

	.therm = nv40_therm_new,

	.timer = nv41_timer_new,

//	.volt = nv40_volt_new,

	.volt = nv40_volt_new,

//	.disp = nv04_disp_new,

//	.dma = nv04_dma_new,

//	.fifo = nv40_fifo_new,
@@ -515,7 +515,7 @@ nv42_chipset = { 
	.mmu = nv41_mmu_new,

	.therm = nv40_therm_new,

	.timer = nv41_timer_new,

//	.volt = nv40_volt_new,

	.volt = nv40_volt_new,

//	.disp = nv04_disp_new,

//	.dma = nv04_dma_new,

//	.fifo = nv40_fifo_new,
@@ -540,7 +540,7 @@ nv43_chipset = { 
	.mmu = nv41_mmu_new,

	.therm = nv40_therm_new,

	.timer = nv41_timer_new,

//	.volt = nv40_volt_new,

	.volt = nv40_volt_new,

//	.disp = nv04_disp_new,

//	.dma = nv04_dma_new,

//	.fifo = nv40_fifo_new,
@@ -565,7 +565,7 @@ nv44_chipset = { 
	.mmu = nv44_mmu_new,

	.therm = nv40_therm_new,

	.timer = nv41_timer_new,

//	.volt = nv40_volt_new,

	.volt = nv40_volt_new,

//	.disp = nv04_disp_new,

//	.dma = nv04_dma_new,

//	.fifo = nv40_fifo_new,
@@ -590,7 +590,7 @@ nv45_chipset = { 
	.mmu = nv04_mmu_new,

	.therm = nv40_therm_new,

	.timer = nv41_timer_new,

//	.volt = nv40_volt_new,

	.volt = nv40_volt_new,

//	.disp = nv04_disp_new,

//	.dma = nv04_dma_new,

//	.fifo = nv40_fifo_new,
@@ -615,7 +615,7 @@ nv46_chipset = { 
	.mmu = nv44_mmu_new,

	.therm = nv40_therm_new,

	.timer = nv41_timer_new,

//	.volt = nv40_volt_new,

	.volt = nv40_volt_new,

//	.disp = nv04_disp_new,

//	.dma = nv04_dma_new,

//	.fifo = nv40_fifo_new,
@@ -640,7 +640,7 @@ nv47_chipset = { 
	.mmu = nv41_mmu_new,

	.therm = nv40_therm_new,

	.timer = nv41_timer_new,

//	.volt = nv40_volt_new,

	.volt = nv40_volt_new,

//	.disp = nv04_disp_new,

//	.dma = nv04_dma_new,

//	.fifo = nv40_fifo_new,
@@ -665,7 +665,7 @@ nv49_chipset = { 
	.mmu = nv41_mmu_new,

	.therm = nv40_therm_new,

	.timer = nv41_timer_new,

//	.volt = nv40_volt_new,

	.volt = nv40_volt_new,

//	.disp = nv04_disp_new,

//	.dma = nv04_dma_new,

//	.fifo = nv40_fifo_new,
@@ -690,7 +690,7 @@ nv4a_chipset = { 
	.mmu = nv44_mmu_new,

	.therm = nv40_therm_new,

	.timer = nv41_timer_new,

//	.volt = nv40_volt_new,

	.volt = nv40_volt_new,

//	.disp = nv04_disp_new,

//	.dma = nv04_dma_new,

//	.fifo = nv40_fifo_new,
@@ -715,7 +715,7 @@ nv4b_chipset = { 
	.mmu = nv41_mmu_new,

	.therm = nv40_therm_new,

	.timer = nv41_timer_new,

//	.volt = nv40_volt_new,

	.volt = nv40_volt_new,

//	.disp = nv04_disp_new,

//	.dma = nv04_dma_new,

//	.fifo = nv40_fifo_new,
@@ -740,7 +740,7 @@ nv4c_chipset = { 
	.mmu = nv44_mmu_new,

	.therm = nv40_therm_new,

	.timer = nv41_timer_new,

//	.volt = nv40_volt_new,

	.volt = nv40_volt_new,

//	.disp = nv04_disp_new,

//	.dma = nv04_dma_new,

//	.fifo = nv40_fifo_new,
@@ -765,7 +765,7 @@ nv4e_chipset = { 
	.mmu = nv44_mmu_new,

	.therm = nv40_therm_new,

	.timer = nv41_timer_new,

//	.volt = nv40_volt_new,

	.volt = nv40_volt_new,

//	.disp = nv04_disp_new,

//	.dma = nv04_dma_new,

//	.fifo = nv40_fifo_new,
@@ -793,7 +793,7 @@ nv50_chipset = { 
	.mxm = nv50_mxm_new,

	.therm = nv50_therm_new,

	.timer = nv41_timer_new,

//	.volt = nv40_volt_new,

	.volt = nv40_volt_new,

//	.disp = nv50_disp_new,

//	.dma = nv50_dma_new,

//	.fifo = nv50_fifo_new,
@@ -818,7 +818,7 @@ nv63_chipset = { 
	.mmu = nv44_mmu_new,

	.therm = nv40_therm_new,

	.timer = nv41_timer_new,

//	.volt = nv40_volt_new,

	.volt = nv40_volt_new,

//	.disp = nv04_disp_new,

//	.dma = nv04_dma_new,

//	.fifo = nv40_fifo_new,
@@ -843,7 +843,7 @@ nv67_chipset = { 
	.mmu = nv44_mmu_new,

	.therm = nv40_therm_new,

	.timer = nv41_timer_new,

//	.volt = nv40_volt_new,

	.volt = nv40_volt_new,

//	.disp = nv04_disp_new,

//	.dma = nv04_dma_new,

//	.fifo = nv40_fifo_new,
@@ -868,7 +868,7 @@ nv68_chipset = { 
	.mmu = nv44_mmu_new,

	.therm = nv40_therm_new,

	.timer = nv41_timer_new,

//	.volt = nv40_volt_new,

	.volt = nv40_volt_new,

//	.disp = nv04_disp_new,

//	.dma = nv04_dma_new,

//	.fifo = nv40_fifo_new,
@@ -896,7 +896,7 @@ nv84_chipset = { 
	.mxm = nv50_mxm_new,

	.therm = g84_therm_new,

	.timer = nv41_timer_new,

//	.volt = nv40_volt_new,

	.volt = nv40_volt_new,

//	.bsp = g84_bsp_new,

//	.cipher = g84_cipher_new,

//	.disp = g84_disp_new,
@@ -927,7 +927,7 @@ nv86_chipset = { 
	.mxm = nv50_mxm_new,

	.therm = g84_therm_new,

	.timer = nv41_timer_new,

//	.volt = nv40_volt_new,

	.volt = nv40_volt_new,

//	.bsp = g84_bsp_new,

//	.cipher = g84_cipher_new,

//	.disp = g84_disp_new,
@@ -958,7 +958,7 @@ nv92_chipset = { 
	.mxm = nv50_mxm_new,

	.therm = g84_therm_new,

	.timer = nv41_timer_new,

//	.volt = nv40_volt_new,

	.volt = nv40_volt_new,

//	.bsp = g84_bsp_new,

//	.cipher = g84_cipher_new,

//	.disp = g84_disp_new,
@@ -989,7 +989,7 @@ nv94_chipset = { 
	.mxm = nv50_mxm_new,

	.therm = g84_therm_new,

	.timer = nv41_timer_new,

//	.volt = nv40_volt_new,

	.volt = nv40_volt_new,

//	.bsp = g84_bsp_new,

//	.cipher = g84_cipher_new,

//	.disp = g94_disp_new,
@@ -1020,7 +1020,7 @@ nv96_chipset = { 
	.imem = nv50_instmem_new,

	.mmu = nv50_mmu_new,

	.bar = g84_bar_new,

//	.volt = nv40_volt_new,

	.volt = nv40_volt_new,

//	.dma = nv50_dma_new,

//	.fifo = g84_fifo_new,

//	.sw = nv50_sw_new,
@@ -1051,7 +1051,7 @@ nv98_chipset = { 
	.imem = nv50_instmem_new,

	.mmu = nv50_mmu_new,

	.bar = g84_bar_new,

//	.volt = nv40_volt_new,

	.volt = nv40_volt_new,

//	.dma = nv50_dma_new,

//	.fifo = g84_fifo_new,

//	.sw = nv50_sw_new,
@@ -1082,7 +1082,7 @@ nva0_chipset = { 
	.mxm = nv50_mxm_new,

	.therm = g84_therm_new,

	.timer = nv41_timer_new,

//	.volt = nv40_volt_new,

	.volt = nv40_volt_new,

//	.bsp = g84_bsp_new,

//	.cipher = g84_cipher_new,

//	.disp = gt200_disp_new,
@@ -1114,7 +1114,7 @@ nva3_chipset = { 
	.pmu = gt215_pmu_new,

	.therm = gt215_therm_new,

	.timer = nv41_timer_new,

//	.volt = nv40_volt_new,

	.volt = nv40_volt_new,

//	.ce[0] = gt215_ce_new,

//	.disp = gt215_disp_new,

//	.dma = nv50_dma_new,
@@ -1147,7 +1147,7 @@ nva5_chipset = { 
	.pmu = gt215_pmu_new,

	.therm = gt215_therm_new,

	.timer = nv41_timer_new,

//	.volt = nv40_volt_new,

	.volt = nv40_volt_new,

//	.ce[0] = gt215_ce_new,

//	.disp = gt215_disp_new,

//	.dma = nv50_dma_new,
@@ -1179,7 +1179,7 @@ nva8_chipset = { 
	.pmu = gt215_pmu_new,

	.therm = gt215_therm_new,

	.timer = nv41_timer_new,

//	.volt = nv40_volt_new,

	.volt = nv40_volt_new,

//	.ce[0] = gt215_ce_new,

//	.disp = gt215_disp_new,

//	.dma = nv50_dma_new,
@@ -1210,7 +1210,7 @@ nvaa_chipset = { 
	.mxm = nv50_mxm_new,

	.therm = g84_therm_new,

	.timer = nv41_timer_new,

//	.volt = nv40_volt_new,

	.volt = nv40_volt_new,

//	.disp = g94_disp_new,

//	.dma = nv50_dma_new,

//	.fifo = g84_fifo_new,
@@ -1241,7 +1241,7 @@ nvac_chipset = { 
	.mxm = nv50_mxm_new,

	.therm = g84_therm_new,

	.timer = nv41_timer_new,

//	.volt = nv40_volt_new,

	.volt = nv40_volt_new,

//	.disp = g94_disp_new,

//	.dma = nv50_dma_new,

//	.fifo = g84_fifo_new,
@@ -1273,7 +1273,7 @@ nvaf_chipset = { 
	.pmu = gt215_pmu_new,

	.therm = gt215_therm_new,

	.timer = nv41_timer_new,

//	.volt = nv40_volt_new,

	.volt = nv40_volt_new,

//	.ce[0] = gt215_ce_new,

//	.disp = gt215_disp_new,

//	.dma = nv50_dma_new,
@@ -1307,7 +1307,7 @@ nvc0_chipset = { 
	.pmu = gf100_pmu_new,

	.therm = gt215_therm_new,

	.timer = nv41_timer_new,

//	.volt = nv40_volt_new,

	.volt = nv40_volt_new,

//	.ce[0] = gf100_ce0_new,

//	.ce[1] = gf100_ce1_new,

//	.disp = gt215_disp_new,
@@ -1342,7 +1342,7 @@ nvc1_chipset = { 
	.pmu = gf100_pmu_new,

	.therm = gt215_therm_new,

	.timer = nv41_timer_new,

//	.volt = nv40_volt_new,

	.volt = nv40_volt_new,

//	.ce[0] = gf100_ce0_new,

//	.disp = gt215_disp_new,

//	.dma = gf100_dma_new,
@@ -1376,7 +1376,7 @@ nvc3_chipset = { 
	.pmu = gf100_pmu_new,

	.therm = gt215_therm_new,

	.timer = nv41_timer_new,

//	.volt = nv40_volt_new,

	.volt = nv40_volt_new,

//	.ce[0] = gf100_ce0_new,

//	.disp = gt215_disp_new,

//	.dma = gf100_dma_new,
@@ -1410,7 +1410,7 @@ nvc4_chipset = { 
	.pmu = gf100_pmu_new,

	.therm = gt215_therm_new,

	.timer = nv41_timer_new,

//	.volt = nv40_volt_new,

	.volt = nv40_volt_new,

//	.ce[0] = gf100_ce0_new,

//	.ce[1] = gf100_ce1_new,

//	.disp = gt215_disp_new,
@@ -1445,7 +1445,7 @@ nvc8_chipset = { 
	.pmu = gf100_pmu_new,

	.therm = gt215_therm_new,

	.timer = nv41_timer_new,

//	.volt = nv40_volt_new,

	.volt = nv40_volt_new,

//	.ce[0] = gf100_ce0_new,

//	.ce[1] = gf100_ce1_new,

//	.disp = gt215_disp_new,
@@ -1480,7 +1480,7 @@ nvce_chipset = { 
	.pmu = gf100_pmu_new,

	.therm = gt215_therm_new,

	.timer = nv41_timer_new,

//	.volt = nv40_volt_new,

	.volt = nv40_volt_new,

//	.ce[0] = gf100_ce0_new,

//	.ce[1] = gf100_ce1_new,

//	.disp = gt215_disp_new,
@@ -1515,7 +1515,7 @@ nvcf_chipset = { 
	.pmu = gf100_pmu_new,

	.therm = gt215_therm_new,

	.timer = nv41_timer_new,

//	.volt = nv40_volt_new,

	.volt = nv40_volt_new,

//	.ce[0] = gf100_ce0_new,

//	.disp = gt215_disp_new,

//	.dma = gf100_dma_new,
@@ -1581,7 +1581,7 @@ nvd9_chipset = { 
	.pmu = gf119_pmu_new,

	.therm = gf119_therm_new,

	.timer = nv41_timer_new,

//	.volt = nv40_volt_new,

	.volt = nv40_volt_new,

//	.ce[0] = gf100_ce0_new,

//	.disp = gf119_disp_new,

//	.dma = gf119_dma_new,
@@ -1615,7 +1615,7 @@ nve4_chipset = { 
	.pmu = gk104_pmu_new,

	.therm = gf119_therm_new,

	.timer = nv41_timer_new,

//	.volt = nv40_volt_new,

	.volt = nv40_volt_new,

//	.ce[0] = gk104_ce0_new,

//	.ce[1] = gk104_ce1_new,

//	.ce[2] = gk104_ce2_new,
@@ -1651,7 +1651,7 @@ nve6_chipset = { 
	.pmu = gk104_pmu_new,

	.therm = gf119_therm_new,

	.timer = nv41_timer_new,

//	.volt = nv40_volt_new,

	.volt = nv40_volt_new,

//	.ce[0] = gk104_ce0_new,

//	.ce[1] = gk104_ce1_new,

//	.ce[2] = gk104_ce2_new,
@@ -1687,7 +1687,7 @@ nve7_chipset = { 
	.pmu = gf119_pmu_new,

	.therm = gf119_therm_new,

	.timer = nv41_timer_new,

//	.volt = nv40_volt_new,

	.volt = nv40_volt_new,

//	.ce[0] = gk104_ce0_new,

//	.ce[1] = gk104_ce1_new,

//	.ce[2] = gk104_ce2_new,
@@ -1717,7 +1717,7 @@ nvea_chipset = { 
	.mmu = gf100_mmu_new,

	.pmu = gk20a_pmu_new,

	.timer = gk20a_timer_new,

//	.volt = gk20a_volt_new,

	.volt = gk20a_volt_new,

//	.ce[2] = gk104_ce2_new,

//	.dma = gf119_dma_new,

//	.fifo = gk20a_fifo_new,
@@ -1747,7 +1747,7 @@ nvf0_chipset = { 
	.pmu = gk110_pmu_new,

	.therm = gf119_therm_new,

	.timer = nv41_timer_new,

//	.volt = nv40_volt_new,

	.volt = nv40_volt_new,

//	.ce[0] = gk104_ce0_new,

//	.ce[1] = gk104_ce1_new,

//	.ce[2] = gk104_ce2_new,
@@ -1783,7 +1783,7 @@ nvf1_chipset = { 
	.pmu = gk110_pmu_new,

	.therm = gf119_therm_new,

	.timer = nv41_timer_new,

//	.volt = nv40_volt_new,

	.volt = nv40_volt_new,

//	.ce[0] = gk104_ce0_new,

//	.ce[1] = gk104_ce1_new,

//	.ce[2] = gk104_ce2_new,
@@ -1819,7 +1819,7 @@ nv106_chipset = { 
	.pmu = gk208_pmu_new,

	.therm = gf119_therm_new,

	.timer = nv41_timer_new,

//	.volt = nv40_volt_new,

	.volt = nv40_volt_new,

//	.ce[0] = gk104_ce0_new,

//	.ce[1] = gk104_ce1_new,

//	.ce[2] = gk104_ce2_new,
@@ -1854,7 +1854,7 @@ nv108_chipset = { 
	.pmu = gk208_pmu_new,

	.therm = gf119_therm_new,

	.timer = nv41_timer_new,

//	.volt = nv40_volt_new,

	.volt = nv40_volt_new,

//	.ce[0] = gk104_ce0_new,

//	.ce[1] = gk104_ce1_new,

//	.ce[2] = gk104_ce2_new,

drivers/gpu/drm/nouveau/nvkm/engine/device/gf100.c

+0 −8
Original line number Diff line number Diff line
@@ -28,7 +28,6 @@ gf100_identify(struct nvkm_device *device) 
{

	switch (device->chipset) {

	case 0xc0:

		device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] =  gf100_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] =  gf100_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  gf100_sw_oclass;
@@ -42,7 +41,6 @@ gf100_identify(struct nvkm_device *device) 
		device->oclass[NVDEV_ENGINE_PM     ] = gf100_pm_oclass;

		break;

	case 0xc4:

		device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] =  gf100_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] =  gf100_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  gf100_sw_oclass;
@@ -56,7 +54,6 @@ gf100_identify(struct nvkm_device *device) 
		device->oclass[NVDEV_ENGINE_PM     ] = gf100_pm_oclass;

		break;

	case 0xc3:

		device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] =  gf100_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] =  gf100_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  gf100_sw_oclass;
@@ -69,7 +66,6 @@ gf100_identify(struct nvkm_device *device) 
		device->oclass[NVDEV_ENGINE_PM     ] = gf100_pm_oclass;

		break;

	case 0xce:

		device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] =  gf100_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] =  gf100_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  gf100_sw_oclass;
@@ -83,7 +79,6 @@ gf100_identify(struct nvkm_device *device) 
		device->oclass[NVDEV_ENGINE_PM     ] = gf100_pm_oclass;

		break;

	case 0xcf:

		device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] =  gf100_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] =  gf100_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  gf100_sw_oclass;
@@ -96,7 +91,6 @@ gf100_identify(struct nvkm_device *device) 
		device->oclass[NVDEV_ENGINE_PM     ] = gf100_pm_oclass;

		break;

	case 0xc1:

		device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] =  gf100_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] =  gf100_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  gf100_sw_oclass;
@@ -109,7 +103,6 @@ gf100_identify(struct nvkm_device *device) 
		device->oclass[NVDEV_ENGINE_PM     ] = gf108_pm_oclass;

		break;

	case 0xc8:

		device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] =  gf100_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] =  gf100_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  gf100_sw_oclass;
@@ -123,7 +116,6 @@ gf100_identify(struct nvkm_device *device) 
		device->oclass[NVDEV_ENGINE_PM     ] = gf100_pm_oclass;

		break;

	case 0xd9:

		device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] =  gf110_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] =  gf100_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  gf100_sw_oclass;

drivers/gpu/drm/nouveau/nvkm/engine/device/gk104.c

+0 −8
Original line number Diff line number Diff line
@@ -28,7 +28,6 @@ gk104_identify(struct nvkm_device *device) 
{

	switch (device->chipset) {

	case 0xe4:

		device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] =  gf110_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] =  gk104_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  gf100_sw_oclass;
@@ -43,7 +42,6 @@ gk104_identify(struct nvkm_device *device) 
		device->oclass[NVDEV_ENGINE_PM     ] = gk104_pm_oclass;

		break;

	case 0xe7:

		device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] =  gf110_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] =  gk104_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  gf100_sw_oclass;
@@ -58,7 +56,6 @@ gk104_identify(struct nvkm_device *device) 
		device->oclass[NVDEV_ENGINE_PM     ] = gk104_pm_oclass;

		break;

	case 0xe6:

		device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] =  gf110_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] =  gk104_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  gf100_sw_oclass;
@@ -79,10 +76,8 @@ gk104_identify(struct nvkm_device *device) 
		device->oclass[NVDEV_ENGINE_GR     ] =  gk20a_gr_oclass;

		device->oclass[NVDEV_ENGINE_CE2    ] = &gk104_ce2_oclass;

		device->oclass[NVDEV_ENGINE_PM     ] = gk104_pm_oclass;

		device->oclass[NVDEV_SUBDEV_VOLT   ] = &gk20a_volt_oclass;

		break;

	case 0xf0:

		device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] =  gf110_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] =  gk104_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  gf100_sw_oclass;
@@ -97,7 +92,6 @@ gk104_identify(struct nvkm_device *device) 
		device->oclass[NVDEV_ENGINE_PM     ] = &gk110_pm_oclass;

		break;

	case 0xf1:

		device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] =  gf110_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] =  gk104_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  gf100_sw_oclass;
@@ -112,7 +106,6 @@ gk104_identify(struct nvkm_device *device) 
		device->oclass[NVDEV_ENGINE_PM     ] = &gk110_pm_oclass;

		break;

	case 0x106:

		device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] =  gf110_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] =  gk208_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  gf100_sw_oclass;
@@ -126,7 +119,6 @@ gk104_identify(struct nvkm_device *device) 
		device->oclass[NVDEV_ENGINE_MSPPP  ] = &gf100_msppp_oclass;

		break;

	case 0x108:

		device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] =  gf110_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] =  gk208_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  gf100_sw_oclass;

drivers/gpu/drm/nouveau/nvkm/engine/device/gm100.c

+0 −3
Original line number Diff line number Diff line
@@ -30,7 +30,6 @@ gm100_identify(struct nvkm_device *device) 
	case 0x117:



#if 0

		device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;

#endif

		device->oclass[NVDEV_ENGINE_DMAOBJ ] =  gf110_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] =  gk208_fifo_oclass;
@@ -54,7 +53,6 @@ gm100_identify(struct nvkm_device *device) 
		/* priv ring says no to 0x10eb14 writes */

#endif

#if 0

		device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;

#endif

		device->oclass[NVDEV_ENGINE_DMAOBJ ] =  gf110_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] =  gm204_fifo_oclass;
@@ -76,7 +74,6 @@ gm100_identify(struct nvkm_device *device) 
		/* priv ring says no to 0x10eb14 writes */

#endif

#if 0

		device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;

#endif

		device->oclass[NVDEV_ENGINE_DMAOBJ ] =  gf110_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] =  gm204_fifo_oclass;