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Commit 4362f4f6 authored by Tvrtko Ursulin's avatar Tvrtko Ursulin
Browse files

drm/i915: Use dev_priv in INTEL_INFO in i915_gem_fence_reg.c 



Plus a small cascade of function prototype changes.

Signed-off-by: default avatarTvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
parent f0836b72

drivers/gpu/drm/i915/i915_drv.h

+2 −2
Original line number Diff line number Diff line
@@ -3174,9 +3174,9 @@ i915_gem_object_ggtt_offset(struct drm_i915_gem_object *o, 
int __must_check i915_vma_get_fence(struct i915_vma *vma);

int __must_check i915_vma_put_fence(struct i915_vma *vma);



void i915_gem_restore_fences(struct drm_device *dev);

void i915_gem_restore_fences(struct drm_i915_private *dev_priv);



void i915_gem_detect_bit_6_swizzle(struct drm_device *dev);

void i915_gem_detect_bit_6_swizzle(struct drm_i915_private *dev_priv);

void i915_gem_object_do_bit_17_swizzle(struct drm_i915_gem_object *obj,

				       struct sg_table *pages);

void i915_gem_object_save_bit_17_swizzle(struct drm_i915_gem_object *obj,

drivers/gpu/drm/i915/i915_gem.c

+3 −4
Original line number Diff line number Diff line
@@ -2750,7 +2750,7 @@ void i915_gem_reset(struct drm_i915_private *dev_priv) 
	for_each_engine(engine, dev_priv, id)

		i915_gem_reset_engine(engine);



	i915_gem_restore_fences(&dev_priv->drm);

	i915_gem_restore_fences(dev_priv);



	if (dev_priv->gt.awake) {

		intel_sanitize_gt_powersave(dev_priv);
@@ -4448,7 +4448,6 @@ i915_gem_cleanup_engines(struct drm_device *dev) 
void

i915_gem_load_init_fences(struct drm_i915_private *dev_priv)

{

	struct drm_device *dev = &dev_priv->drm;

	int i;



	if (INTEL_INFO(dev_priv)->gen >= 7 && !IS_VALLEYVIEW(dev_priv) &&
@@ -4472,9 +4471,9 @@ i915_gem_load_init_fences(struct drm_i915_private *dev_priv) 
		fence->id = i;

		list_add_tail(&fence->link, &dev_priv->mm.fence_list);

	}

	i915_gem_restore_fences(dev);

	i915_gem_restore_fences(dev_priv);



	i915_gem_detect_bit_6_swizzle(dev);

	i915_gem_detect_bit_6_swizzle(dev_priv);

}



int

drivers/gpu/drm/i915/i915_gem_fence_reg.c

+5 −7
Original line number Diff line number Diff line
@@ -368,15 +368,14 @@ i915_vma_get_fence(struct i915_vma *vma) 


/**

 * i915_gem_restore_fences - restore fence state

 * @dev: DRM device

 * @dev_priv: i915 device private

 *

 * Restore the hw fence state to match the software tracking again, to be called

 * after a gpu reset and on resume. Note that on runtime suspend we only cancel

 * the fences, to be reacquired by the user later.

 */

void i915_gem_restore_fences(struct drm_device *dev)

void i915_gem_restore_fences(struct drm_i915_private *dev_priv)

{

	struct drm_i915_private *dev_priv = to_i915(dev);

	int i;



	for (i = 0; i < dev_priv->num_fence_regs; i++) {
@@ -451,15 +450,14 @@ void i915_gem_restore_fences(struct drm_device *dev) 


/**

 * i915_gem_detect_bit_6_swizzle - detect bit 6 swizzling pattern

 * @dev: DRM device

 * @dev_priv: i915 device private

 *

 * Detects bit 6 swizzling of address lookup between IGD access and CPU

 * access through main memory.

 */

void

i915_gem_detect_bit_6_swizzle(struct drm_device *dev)

i915_gem_detect_bit_6_swizzle(struct drm_i915_private *dev_priv)

{

	struct drm_i915_private *dev_priv = to_i915(dev);

	uint32_t swizzle_x = I915_BIT_6_SWIZZLE_UNKNOWN;

	uint32_t swizzle_y = I915_BIT_6_SWIZZLE_UNKNOWN;
@@ -473,7 +471,7 @@ i915_gem_detect_bit_6_swizzle(struct drm_device *dev) 
		 */

		swizzle_x = I915_BIT_6_SWIZZLE_NONE;

		swizzle_y = I915_BIT_6_SWIZZLE_NONE;

	} else if (INTEL_INFO(dev)->gen >= 6) {

	} else if (INTEL_GEN(dev_priv) >= 6) {

		if (dev_priv->preserve_bios_swizzle) {

			if (I915_READ(DISP_ARB_CTL) &

			    DISP_TILE_SURFACE_SWIZZLING) {

drivers/gpu/drm/i915/i915_suspend.c

+1 −1
Original line number Diff line number Diff line
@@ -114,7 +114,7 @@ int i915_restore_state(struct drm_device *dev) 


	mutex_lock(&dev->struct_mutex);



	i915_gem_restore_fences(dev);

	i915_gem_restore_fences(dev_priv);



	if (IS_GEN4(dev_priv))

		pci_write_config_word(pdev, GCDGMBUS,