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Commit 4311ae04 authored by Basavaraj Natikar's avatar Basavaraj Natikar Committed by Greg Kroah-Hartman
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x86/PCI: Add quirk for AMD XHCI controller that loses MSI-X state in D3hot 

commit f195fc1e9715ba826c3b62d58038f760f66a4fe9 upstream.

The AMD [1022:15b8] USB controller loses some internal functional MSI-X
context when transitioning from D0 to D3hot. BIOS normally traps D0->D3hot
and D3hot->D0 transitions so it can save and restore that internal context,
but some firmware in the field can't do this because it fails to clear the
AMD_15B8_RCC_DEV2_EPF0_STRAP2 NO_SOFT_RESET bit.

Clear AMD_15B8_RCC_DEV2_EPF0_STRAP2 NO_SOFT_RESET bit before USB controller
initialization during boot.

Link: https://lore.kernel.org/linux-usb/Y%2Fz9GdHjPyF2rNG3@glanzmann.de/T/#u
Link: https://lore.kernel.org/r/20230329172859.699743-1-Basavaraj.Natikar@amd.com


Reported-by: default avatarThomas Glanzmann <thomas@glanzmann.de>
Tested-by: default avatarThomas Glanzmann <thomas@glanzmann.de>
Signed-off-by: default avatarBasavaraj Natikar <Basavaraj.Natikar@amd.com>
Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
Reviewed-by: default avatarMario Limonciello <mario.limonciello@amd.com>
Cc: stable@vger.kernel.org
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 110d425c

arch/x86/pci/fixup.c

+21 −0
Original line number Diff line number Diff line
@@ -7,6 +7,7 @@ 
#include <linux/dmi.h>

#include <linux/pci.h>

#include <linux/vgaarb.h>

#include <asm/amd_nb.h>

#include <asm/hpet.h>

#include <asm/pci_x86.h>
@@ -824,3 +825,23 @@ static void rs690_fix_64bit_dma(struct pci_dev *pdev) 
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATI, 0x7910, rs690_fix_64bit_dma);



#endif



#ifdef CONFIG_AMD_NB



#define AMD_15B8_RCC_DEV2_EPF0_STRAP2                                  0x10136008

#define AMD_15B8_RCC_DEV2_EPF0_STRAP2_NO_SOFT_RESET_DEV2_F0_MASK       0x00000080L



static void quirk_clear_strap_no_soft_reset_dev2_f0(struct pci_dev *dev)

{

	u32 data;



	if (!amd_smn_read(0, AMD_15B8_RCC_DEV2_EPF0_STRAP2, &data)) {

		data &= ~AMD_15B8_RCC_DEV2_EPF0_STRAP2_NO_SOFT_RESET_DEV2_F0_MASK;

		if (amd_smn_write(0, AMD_15B8_RCC_DEV2_EPF0_STRAP2, data))

			pci_err(dev, "Failed to write data 0x%x\n", data);

	} else {

		pci_err(dev, "Failed to read data\n");

	}

}

DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, 0x15b8, quirk_clear_strap_no_soft_reset_dev2_f0);

#endif