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Commit 42eaf185 authored by Linus Torvalds's avatar Linus Torvalds
Browse files
Pull MMC updates from Ulf Hansson:
 "MMC core:
   - Fixup max_discard/trim calculations
   - Announce SD specs greater than 4.0
   - Add discard support for SD cards
   - Don't do retries for CMD6 (SWITCH command)
   - Various cleanups and re-structuring

  MMC host:
   - cqhci:
      * Add maintainers for eMMC CQHCI driver
   - sdhci:
      * Consolidate WP GPIO code
      * Add ADMA3 DMA support for V4 enabled host
      * Fixup card detect support in pci-o2micro driver
      * Add support for CMDQ and SDMMC pads auto-calibration in tegra
        driver
      * Add DCMD support and CMDQ support, support for i.MX6ULL variant,
        fixup HS400 timing issue and add HS400_ES support for i.MX8QXP
        to esdhc-imx driver
      * Avoid CRC errors by adjusting settings to speed mode and fixup
        card initialization for high speed mode in renesas_sdhi
      * Fixup timeout settings for omap
      * Enable 8 bits bus-width support in atmel-mci
      * Convert some legacy code in jz4740 driver to use modern APIs
      * Send a CMD12 to clear DPSM at errors for STM32 sdmmc mmci
        driver"

* tag 'mmc-v5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc: (69 commits)
  mmc:fix a bug when max_discard is 0
  mmc: core: Add a debug print when the card may have been replaced
  mmc: core: Add sd discard timeout
  mmc: core: Add discard support to sd
  mmc: sdhci-esdhc-imx: clear the HALT bit when enable CQE
  mmc: core: do not retry CMD6 in __mmc_switch()
  mmc: core: Convert mmc_align_data_size() into an SDIO specific function
  mmc: core: Move mmc_of_parse_voltage() to host.c
  mmc: core: Convert mmc_regulator_get_ocrmask() to static
  mmc: core: Move regulator helpers to separate file
  mmc: of_mmc_spi: Convert to mmc_of_parse_voltage()
  mmc: core: Drop retries as in-parameter to mmc_wait_for_app_cmd()
  mmc: core: Convert mmc_wait_for_app_cmd() to static
  mmc: renesas_sdhi: Change HW adjustment register according to speed mode
  mmc: mmci: Send a CMD12 to clear the DPSM at errors
  mmc: sdhci-xenon: Fixup already marked switch fall-through
  mmc: sdhci-tegra: drop ->get_ro() implementation
  mmc: sdhci-omap: drop ->get_ro() implementation
  mmc: sdhci: use WP GPIO in sdhci_check_ro()
  mmc: wmt-sdmmc: Drop unused include
  ...
parents c8d950ab d4721339
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+1 −0
Original line number Diff line number Diff line
@@ -15,6 +15,7 @@ Required properties:
	       "fsl,imx6q-usdhc"
	       "fsl,imx6sl-usdhc"
	       "fsl,imx6sx-usdhc"
	       "fsl,imx6ull-usdhc"
	       "fsl,imx7d-usdhc"
	       "fsl,imx8qxp-usdhc"

+2 −0
Original line number Diff line number Diff line
@@ -62,6 +62,8 @@ Optional properties:
  be referred to mmc-pwrseq-simple.txt. But now it's reused as a tunable delay
  waiting for I/O signalling and card power supply to be stable, regardless of
  whether pwrseq-simple is used. Default to 10ms if no available.
- supports-cqe : The presence of this property indicates that the corresponding
  MMC host controller supports HW command queue feature.

*NOTE* on CD and WP polarity. To use common for all SD/MMC host controllers line
polarity properties, we have to fix the meaning of the "normal" and "inverted"
+5 −1
Original line number Diff line number Diff line
@@ -39,12 +39,16 @@ sdhci@c8000200 {
	bus-width = <8>;
};

Optional properties for Tegra210 and Tegra186:
Optional properties for Tegra210, Tegra186 and Tegra194:
- pinctrl-names, pinctrl-0, pinctrl-1 : Specify pad voltage
  configurations. Valid pinctrl-names are "sdmmc-3v3" and "sdmmc-1v8"
  for controllers supporting multiple voltage levels. The order of names
  should correspond to the pin configuration states in pinctrl-0 and
  pinctrl-1.
- pinctrl-names : "sdmmc-3v3-drv" and "sdmmc-1v8-drv" are applicable for
  Tegra210 where pad config registers are in the pinmux register domain
  for pull-up-strength and pull-down-strength values configuration when
  using pads at 3V3 and 1V8 levels.
- nvidia,only-1-8-v : The presence of this property indicates that the
  controller operates at a 1.8 V fixed I/O voltage.
- nvidia,pad-autocal-pull-up-offset-3v3,
+0 −28
Original line number Diff line number Diff line
@@ -24,31 +24,3 @@ Examples:
		dmas = <&sdma 61 &sdma 62>;
		dma-names = "tx", "rx";
	};

* TI MMC host controller for OMAP1 and 2420

The MMC Host Controller on TI OMAP1 and 2420 family provides
an interface for MMC, SD, and SDIO types of memory cards.

This file documents differences between the core properties described
by mmc.txt and the properties used by the omap mmc driver.

Note that this driver will not work with omap2430 or later omaps,
please see the omap hsmmc driver for the current omaps.

Required properties:
- compatible: Must be "ti,omap2420-mmc", for OMAP2420 controllers
- ti,hwmods: For 2420, must be "msdi<n>", where n is controller
  instance starting 1

Examples:

	msdi1: mmc@4809c000 {
		compatible = "ti,omap2420-mmc";
		ti,hwmods = "msdi1";
		reg = <0x4809c000 0x80>;
		interrupts = <83>;
		dmas = <&sdma 61 &sdma 62>;
		dma-names = "tx", "rx";
	};
+8 −1
Original line number Diff line number Diff line
@@ -13616,11 +13616,18 @@ F: drivers/mmc/host/sdhci-brcmstb*
SECURE DIGITAL HOST CONTROLLER INTERFACE (SDHCI) DRIVER
M:	Adrian Hunter <adrian.hunter@intel.com>
L:	linux-mmc@vger.kernel.org
T:	git git://git.infradead.org/users/ahunter/linux-sdhci.git
S:	Maintained
F:	drivers/mmc/host/sdhci*
F:	include/linux/mmc/sdhci*

EMMC CMDQ HOST CONTROLLER INTERFACE (CQHCI) DRIVER
M:	Adrian Hunter <adrian.hunter@intel.com>
M:	Ritesh Harjani <riteshh@codeaurora.org>
M:	Asutosh Das <asutoshd@codeaurora.org>
L:	linux-mmc@vger.kernel.org
S:	Maintained
F:	drivers/mmc/host/cqhci*

SYNOPSYS SDHCI COMPLIANT DWC MSHC DRIVER
M:	Prabu Thangamuthu <prabu.t@synopsys.com>
M:	Manjunath M B <manjumb@synopsys.com>
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