ARM: dts: msm: Add pinctrl node for TLMM on Direwolf SoC (42e2132d) · Commits · e / devices / android_kernel_fairphone_FP5

bindings/pinctrl/qcom,direwolf-pinctrl.yaml

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		%YAML 1.2
		---
		$id: http://devicetree.org/schemas/bindings/pinctrl/qcom,direwolf-pinctrl.yaml#
		$schema: http://devicetree.org/meta-schemas/core.yaml#

		title: Qualcomm Technologies, Inc. DIREWOLF TLMM block

		description: \|
		This binding describes the Top Level Mode Multiplexer block found in the
		Direwolf platform.

		properties:
		compatible:
		Usage: required
		Value type: <string>
		Definition: must be "qcom,direwolf-pinctrl"

		reg:
		Usage: required
		Value type: <prop-encoded-array>
		Definition: the base address and size of the TLMM register space.

		interrupts:
		Usage: required
		Value type: <prop-encoded-array>
		Definition: should specify the TLMM summary IRQ.

		interrupt-controller:
		Usage: required
		Value type: <none>
		Definition: identifies this node as an interrupt controller

		#interrupt-cells:
		Usage: required
		Value type: <u32>
		Definition: must be 2. Specifying the pin number and flags, as defined
		in <dt-bindings/interrupt-controller/irq.h>

		gpio-controller:
		Usage: required
		Value type: <none>
		Definition: identifies this node as a gpio controller

		#gpio-cells:
		Usage: required
		Value type: <u32>
		Definition: must be 2. Specifying the pin number and flags, as defined
		in <dt-bindings/gpio/gpio.h>

		wakeup-parent:
		Usage: optional
		Value type: <phandle>
		Definition: A phandle to the wakeup interrupt controller for the SoC.

		Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for
		a general description of GPIO and interrupt bindings.

		Please refer to pinctrl-bindings.txt in this directory for details of the
		common pinctrl bindings used by client devices, including the meaning of the
		phrase "pin configuration node".

		The pin configuration nodes act as a container for an arbitrary number of
		subnodes. Each of these subnodes represents some desired configuration for a
		pin, a group, or a list of pins or groups. This configuration can include the
		mux function to select on those pin(s)/group(s), and various pin configuration
		parameters, such as pull-up, drive strength, etc.


		PIN CONFIGURATION NODES:

		The name of each subnode is not important; all subnodes should be enumerated
		and processed purely based on their content.

		Each subnode only affects those parameters that are explicitly listed. In
		other words, a subnode that lists a mux function but no pin configuration
		parameters implies no information about any pin configuration parameters.
		Similarly, a pin subnode that describes a pullup parameter implies no
		information about e.g. the mux function.


		The following generic properties as defined in pinctrl-bindings.txt are valid
		to specify in a pin configuration subnode:

		pins:
		Usage: required
		Value type: <string-array>
		Definition: List of gpio pins affected by the properties specified in
		this subnode.

		Valid pins:
		gpio0-gpio227
		Supports mux, bias and drive-strength

		sdc1_clk, sdc1_cmd, sdc1_data sdc2_clk, sdc2_cmd,
		sdc2_data sdc1_rclk
		Supports bias and drive-strength

		function:
		Usage: required
		Value type: <string>
		Definition: Specify the alternative function to be configured for the
		specified pins. Functions are only valid for gpio pins.

		bias-disable:
		Usage: optional
		Value type: <none>
		Definition: The specified pins should be configured as no pull.

		bias-pull-down:
		Usage: optional
		Value type: <none>
		Definition: The specified pins should be configured as pull down.

		bias-pull-up:
		Usage: optional
		Value type: <none>
		Definition: The specified pins should be configured as pull up.

		output-high:
		Usage: optional
		Value type: <none>
		Definition: The specified pins are configured in output mode, driven high.
		Not valid for sdc pins.

		output-low:
		Usage: optional
		Value type: <none>
		Definition: The specified pins are configured in output mode, driven low.
		Not valid for sdc pins.

		drive-strength:
		Usage: optional
		Value type: <u32>
		Definition: Selects the drive strength for the specified pins, in mA.
		Valid values: 2, 4, 6, 8, 10, 12, 14 and 16

		examples:
		- \|
		tlmm: pinctrl@03000000 {
		compatible = "qcom,direwolf-pinctrl";
		reg = <0x03000000 0xdc2000>;
		interrupts = <0 208 0>;
		gpio-controller;
		#gpio-cells = <2>;
		interrupt-controller;
		#interrupt-cells = <2>;
		wakeup-parent = <&pdc>;
		};

qcom/direwolf-pinctrl.dtsi

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		&tlmm { };

qcom/direwolf.dtsi

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		@@ -413,4 +413,17 @@
		status = "disabled";
		};
		};

		tlmm: pinctrl@f000000 {
		compatible = "qcom,direwolf-pinctrl";
		reg = <0x0F000000 0x1000000>;
		interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
		gpio-controller;
		#gpio-cells = <2>;
		interrupt-controller;
		#interrupt-cells = <2>;
		};

		};

		#include "direwolf-pinctrl.dtsi"