Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 428cb860 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'reset-for-v5.4' of git://git.pengutronix.de/git/pza/linux into arm/drivers 

Reset controller changes for v5.4

This tag adds support for the i.MX8MM SRC via the reset-imx7 driver
and for DesignWare IP reset controllers via the reset-simple driver.
A typo in the i.MX8MQ DSI reset definitions is fixed, and the Meson
reset driver and binding headers are updated to SPDX license
identifiers.

* tag 'reset-for-v5.4' of git://git.pengutronix.de/git/pza/linux:
  reset: Add DesignWare IP support to simple reset
  dt-bindings: Document the DesignWare IP reset bindings
  dt-bindings: reset: amlogic,meson8b-reset: update with SPDX Licence identifier
  dt-bindings: reset: amlogic,meson-gxbb-reset: update with SPDX Licence identifier
  reset: reset-meson: update with SPDX Licence identifier
  dt-bindings: reset: Fix typo in imx8mq resets
  dt-bindings: reset: imx7: Add support for i.MX8MM

Link: https://lore.kernel.org/r/1565603668.5017.2.camel@pengutronix.de


Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents deb0df1a ea651ffd

Documentation/devicetree/bindings/reset/fsl,imx7-src.txt

+4 −2
Original line number Diff line number Diff line
@@ -8,6 +8,7 @@ Required properties: 
- compatible:

	- For i.MX7 SoCs should be "fsl,imx7d-src", "syscon"

	- For i.MX8MQ SoCs should be "fsl,imx8mq-src", "syscon"

	- For i.MX8MM SoCs should be "fsl,imx8mm-src", "fsl,imx8mq-src", "syscon"

- reg: should be register base and length as documented in the

  datasheet

- interrupts: Should contain SRC interrupt
@@ -46,5 +47,6 @@ Example: 




For list of all valid reset indices see

<dt-bindings/reset/imx7-reset.h> for i.MX7 and

<dt-bindings/reset/imx8mq-reset.h> for i.MX8MQ
 
<dt-bindings/reset/imx7-reset.h> for i.MX7,

<dt-bindings/reset/imx8mq-reset.h> for i.MX8MQ and

<dt-bindings/reset/imx8mq-reset.h> for i.MX8MM

Documentation/devicetree/bindings/reset/snps,dw-reset.txt

0 → 100644
+30 −0
Original line number Diff line number Diff line 
Synopsys DesignWare Reset controller

=======================================



Please also refer to reset.txt in this directory for common reset

controller binding usage.



Required properties:



- compatible: should be one of the following.

	"snps,dw-high-reset" - for active high configuration

	"snps,dw-low-reset" - for active low configuration



- reg: physical base address of the controller and length of memory mapped

	region.



- #reset-cells: must be 1.



example:



	dw_rst_1: reset-controller@0000 {

		compatible = "snps,dw-high-reset";

		reg = <0x0000 0x4>;

		#reset-cells = <1>;

	};



	dw_rst_2: reset-controller@1000 {i

		compatible = "snps,dw-low-reset";

		reg = <0x1000 0x8>;

		#reset-cells = <1>;

	};

drivers/reset/Kconfig

+1 −1
Original line number Diff line number Diff line
@@ -118,7 +118,7 @@ config RESET_QCOM_PDC 


config RESET_SIMPLE

	bool "Simple Reset Controller Driver" if COMPILE_TEST

	default ARCH_STM32 || ARCH_STRATIX10 || ARCH_SUNXI || ARCH_ZX || ARCH_ASPEED || ARCH_BITMAIN

	default ARCH_STM32 || ARCH_STRATIX10 || ARCH_SUNXI || ARCH_ZX || ARCH_ASPEED || ARCH_BITMAIN || ARC

	help

	  This enables a simple reset controller driver for reset lines that

	  that can be asserted and deasserted by toggling bits in a contiguous,

drivers/reset/reset-imx7.c

+6 −6
Original line number Diff line number Diff line
@@ -169,9 +169,9 @@ static const struct imx7_src_signal imx8mq_src_signals[IMX8MQ_RESET_NUM] = { 
	[IMX8MQ_RESET_OTG2_PHY_RESET]		= { SRC_USBOPHY2_RCR, BIT(0) },

	[IMX8MQ_RESET_MIPI_DSI_RESET_BYTE_N]	= { SRC_MIPIPHY_RCR, BIT(1) },

	[IMX8MQ_RESET_MIPI_DSI_RESET_N]		= { SRC_MIPIPHY_RCR, BIT(2) },

	[IMX8MQ_RESET_MIPI_DIS_DPI_RESET_N]	= { SRC_MIPIPHY_RCR, BIT(3) },

	[IMX8MQ_RESET_MIPI_DIS_ESC_RESET_N]	= { SRC_MIPIPHY_RCR, BIT(4) },

	[IMX8MQ_RESET_MIPI_DIS_PCLK_RESET_N]	= { SRC_MIPIPHY_RCR, BIT(5) },

	[IMX8MQ_RESET_MIPI_DSI_DPI_RESET_N]	= { SRC_MIPIPHY_RCR, BIT(3) },

	[IMX8MQ_RESET_MIPI_DSI_ESC_RESET_N]	= { SRC_MIPIPHY_RCR, BIT(4) },

	[IMX8MQ_RESET_MIPI_DSI_PCLK_RESET_N]	= { SRC_MIPIPHY_RCR, BIT(5) },

	[IMX8MQ_RESET_PCIEPHY]			= { SRC_PCIEPHY_RCR,

						    BIT(2) | BIT(1) },

	[IMX8MQ_RESET_PCIEPHY_PERST]		= { SRC_PCIEPHY_RCR, BIT(3) },
@@ -220,9 +220,9 @@ static int imx8mq_reset_set(struct reset_controller_dev *rcdev, 


	case IMX8MQ_RESET_PCIE_CTRL_APPS_EN:

	case IMX8MQ_RESET_PCIE2_CTRL_APPS_EN:	/* fallthrough */

	case IMX8MQ_RESET_MIPI_DIS_PCLK_RESET_N:	/* fallthrough */

	case IMX8MQ_RESET_MIPI_DIS_ESC_RESET_N:	/* fallthrough */

	case IMX8MQ_RESET_MIPI_DIS_DPI_RESET_N:	/* fallthrough */

	case IMX8MQ_RESET_MIPI_DSI_PCLK_RESET_N:	/* fallthrough */

	case IMX8MQ_RESET_MIPI_DSI_ESC_RESET_N:	/* fallthrough */

	case IMX8MQ_RESET_MIPI_DSI_DPI_RESET_N:	/* fallthrough */

	case IMX8MQ_RESET_MIPI_DSI_RESET_N:	/* fallthrough */

	case IMX8MQ_RESET_MIPI_DSI_RESET_BYTE_N:	/* fallthrough */

		value = assert ? 0 : bit;

drivers/reset/reset-meson.c

+1 −50
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause

/*

 * Amlogic Meson Reset Controller driver

 *

 * This file is provided under a dual BSD/GPLv2 license.  When using or

 * redistributing this file, you may do so under either license.

 *

 * GPL LICENSE SUMMARY

 *

 * Copyright (c) 2016 BayLibre, SAS.

 * Author: Neil Armstrong <narmstrong@baylibre.com>

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of version 2 of the GNU General Public License as

 * published by the Free Software Foundation.

 *

 * This program is distributed in the hope that it will be useful, but

 * WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU

 * General Public License for more details.

 *

 * You should have received a copy of the GNU General Public License

 * along with this program; if not, see <http://www.gnu.org/licenses/>.

 * The full GNU General Public License is included in this distribution

 * in the file called COPYING.

 *

 * BSD LICENSE

 *

 * Copyright (c) 2016 BayLibre, SAS.

 * Author: Neil Armstrong <narmstrong@baylibre.com>

 *

 * Redistribution and use in source and binary forms, with or without

 * modification, are permitted provided that the following conditions

 * are met:

 *

 *   * Redistributions of source code must retain the above copyright

 *     notice, this list of conditions and the following disclaimer.

 *   * Redistributions in binary form must reproduce the above copyright

 *     notice, this list of conditions and the following disclaimer in

 *     the documentation and/or other materials provided with the

 *     distribution.

 *   * Neither the name of Intel Corporation nor the names of its

 *     contributors may be used to endorse or promote products derived

 *     from this software without specific prior written permission.

 *

 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS

 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT

 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR

 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT

 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,

 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT

 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,

 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY

 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE

 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

 */

#include <linux/err.h>

#include <linux/init.h>