Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 41afb1df authored by Andy Shevchenko's avatar Andy Shevchenko Committed by Thomas Gleixner
Browse files

x86/platform/intel-mid: Remove per platform code 



After custom TSC calibration gone, there is no more reason to have
custom platform code for each of Intel MID.

Thus, remove it for good.

Signed-off-by: default avatarAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: Pavel Tatashin <pasha.tatashin@oracle.com>
Link: https://lkml.kernel.org/r/20180629193113.84425-7-andriy.shevchenko@linux.intel.com
parent d99e5da9

arch/x86/include/asm/intel-mid.h

+0 −29
Original line number Diff line number Diff line
@@ -80,35 +80,6 @@ enum intel_mid_cpu_type { 


extern enum intel_mid_cpu_type __intel_mid_cpu_chip;



/**

 * struct intel_mid_ops - Interface between intel-mid & sub archs

 * @arch_setup: arch_setup function to re-initialize platform

 *		structures (x86_init, x86_platform_init)

 *

 * This structure can be extended if any new interface is required

 * between intel-mid & its sub arch files.

 */

struct intel_mid_ops {

	void (*arch_setup)(void);

};



/* Helper API's for INTEL_MID_OPS_INIT */

#define DECLARE_INTEL_MID_OPS_INIT(cpuname, cpuid)				\

	[cpuid] = get_##cpuname##_ops



/* Maximum number of CPU ops */

#define MAX_CPU_OPS(a)			(sizeof(a)/sizeof(void *))



/*

 * For every new cpu addition, a weak get_<cpuname>_ops() function needs be

 * declared in arch/x86/platform/intel_mid/intel_mid_weak_decls.h.

 */

#define INTEL_MID_OPS_INIT {							\

	DECLARE_INTEL_MID_OPS_INIT(penwell, INTEL_MID_CPU_CHIP_PENWELL),	\

	DECLARE_INTEL_MID_OPS_INIT(cloverview, INTEL_MID_CPU_CHIP_CLOVERVIEW),	\

	DECLARE_INTEL_MID_OPS_INIT(tangier, INTEL_MID_CPU_CHIP_TANGIER)		\

};



#ifdef CONFIG_X86_INTEL_MID



static inline enum intel_mid_cpu_type intel_mid_identify_cpu(void)

arch/x86/platform/intel-mid/Makefile

+1 −1
Original line number Diff line number Diff line 
obj-$(CONFIG_X86_INTEL_MID) += intel-mid.o intel_mid_vrtc.o mfld.o mrfld.o pwr.o

obj-$(CONFIG_X86_INTEL_MID) += intel-mid.o intel_mid_vrtc.o pwr.o



# SFI specific code

ifdef CONFIG_X86_INTEL_MID

arch/x86/platform/intel-mid/intel-mid.c

+1 −16
Original line number Diff line number Diff line
@@ -36,8 +36,6 @@ 
#include <asm/apb_timer.h>

#include <asm/reboot.h>



#include "intel_mid_weak_decls.h"



/*

 * the clockevent devices on Moorestown/Medfield can be APBT or LAPIC clock,

 * cmdline option x86_intel_mid_timer can be used to override the configuration
@@ -61,10 +59,6 @@ 


enum intel_mid_timer_options intel_mid_timer_options;



/* intel_mid_ops to store sub arch ops */

static struct intel_mid_ops *intel_mid_ops;

/* getter function for sub arch ops*/

static void *(*get_intel_mid_ops[])(void) = INTEL_MID_OPS_INIT;

enum intel_mid_cpu_type __intel_mid_cpu_chip;

EXPORT_SYMBOL_GPL(__intel_mid_cpu_chip);
@@ -128,6 +122,7 @@ static void intel_mid_arch_setup(void) 
	case 0x3C:

	case 0x4A:

		__intel_mid_cpu_chip = INTEL_MID_CPU_CHIP_TANGIER;

		x86_platform.legacy.rtc = 1;

		break;

	case 0x27:

	default:
@@ -135,17 +130,7 @@ static void intel_mid_arch_setup(void) 
		break;

	}



	if (__intel_mid_cpu_chip < MAX_CPU_OPS(get_intel_mid_ops))

		intel_mid_ops = get_intel_mid_ops[__intel_mid_cpu_chip]();

	else {

		intel_mid_ops = get_intel_mid_ops[INTEL_MID_CPU_CHIP_PENWELL]();

		pr_info("ARCH: Unknown SoC, assuming Penwell!\n");

	}



out:

	if (intel_mid_ops->arch_setup)

		intel_mid_ops->arch_setup();



	/*

	 * Intel MID platforms are using explicitly defined regulators.

	 *

arch/x86/platform/intel-mid/intel_mid_weak_decls.h

deleted100644 → 0
+0 −18
Original line number Diff line number Diff line 
/*

 * intel_mid_weak_decls.h: Weak declarations of intel-mid.c

 *

 * (C) Copyright 2013 Intel Corporation

 *

 * This program is free software; you can redistribute it and/or

 * modify it under the terms of the GNU General Public License

 * as published by the Free Software Foundation; version 2

 * of the License.

 */





/* For every CPU addition a new get_<cpuname>_ops interface needs

 * to be added.

 */

extern void *get_penwell_ops(void);

extern void *get_cloverview_ops(void);

extern void *get_tangier_ops(void);

arch/x86/platform/intel-mid/mfld.c

deleted100644 → 0
+0 −34
Original line number Diff line number Diff line 
/*

 * mfld.c: Intel Medfield platform setup code

 *

 * (C) Copyright 2013 Intel Corporation

 *

 * This program is free software; you can redistribute it and/or

 * modify it under the terms of the GNU General Public License

 * as published by the Free Software Foundation; version 2

 * of the License.

 */



#include <linux/init.h>



#include <asm/intel-mid.h>



#include "intel_mid_weak_decls.h"



static void __init penwell_arch_setup(void)

{

}



static struct intel_mid_ops penwell_ops = {

	.arch_setup = penwell_arch_setup,

};



void *get_penwell_ops(void)

{

	return &penwell_ops;

}



void *get_cloverview_ops(void)

{

	return &penwell_ops;

}