Loading qcom/direwolf-smp2p.dtsi 0 → 100644 +76 −0 Original line number Diff line number Diff line #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/soc/qcom,ipcc.h> &soc { qcom,smp2p-adsp { compatible = "qcom,smp2p"; qcom,smem = <443>, <429>; interrupt-parent = <&ipcc_mproc>; interrupts = <IPCC_CLIENT_LPASS IPCC_MPROC_SIGNAL_SMP2P IRQ_TYPE_EDGE_RISING>; mboxes = <&ipcc_mproc IPCC_CLIENT_LPASS IPCC_MPROC_SIGNAL_SMP2P>; qcom,local-pid = <0>; qcom,remote-pid = <2>; adsp_smp2p_out: master-kernel { qcom,entry-name = "master-kernel"; #qcom,smem-state-cells = <1>; }; adsp_smp2p_in: slave-kernel { qcom,entry-name = "slave-kernel"; interrupt-controller; #interrupt-cells = <2>; }; smp2p_rdbg2_out: qcom,smp2p-rdbg2-out { qcom,entry-name = "rdbg"; #qcom,smem-state-cells = <1>; }; smp2p_rdbg2_in: qcom,smp2p-rdbg2-in { qcom,entry-name = "rdbg"; interrupt-controller; #interrupt-cells = <2>; }; }; qcom,smp2p-cdsp@1799000c { compatible = "qcom,smp2p"; qcom,smem = <94>, <432>; interrupt-parent = <&ipcc_mproc>; interrupts = <IPCC_CLIENT_CDSP IPCC_MPROC_SIGNAL_SMP2P IRQ_TYPE_EDGE_RISING>; mboxes = <&ipcc_mproc IPCC_CLIENT_CDSP IPCC_MPROC_SIGNAL_SMP2P>; qcom,local-pid = <0>; qcom,remote-pid = <5>; cdsp_smp2p_out: master-kernel { qcom,entry-name = "master-kernel"; #qcom,smem-state-cells = <1>; }; cdsp_smp2p_in: slave-kernel { qcom,entry-name = "slave-kernel"; interrupt-controller; #interrupt-cells = <2>; }; smp2p_rdbg5_out: qcom,smp2p-rdbg5-out { qcom,entry-name = "rdbg"; #qcom,smem-state-cells = <1>; }; smp2p_rdbg5_in: qcom,smp2p-rdbg5-in { qcom,entry-name = "rdbg"; interrupt-controller; #interrupt-cells = <2>; }; smp2p_qvrexternal5_out: qcom,smp2p-qvrexternal5-out { qcom,entry-name = "qvrexternal"; #qcom,smem-state-cells = <1>; }; }; }; qcom/direwolf.dtsi +135 −0 Original line number Diff line number Diff line Loading @@ -1623,6 +1623,140 @@ < 3000000 2 >; }; }; tcsr_mutex_block: syscon@1f40000 { compatible = "syscon"; reg = <0x1f40000 0x20000>; }; tcsr_mutex: hwlock@1f40000 { compatible = "qcom,tcsr-mutex"; syscon = <&tcsr_mutex_block 0 0x1000>; #hwlock-cells = <1>; }; smem: qcom,smem { compatible = "qcom,smem"; memory-region = <&smem_mem>; hwlocks = <&tcsr_mutex 3>; }; qcom,qsee_ipc_irq_bridge { compatible = "qcom,qsee-ipc-irq-bridge"; qcom,qsee-ipc-irq-spss { qcom,dev-name = "qsee_ipc_irq_spss"; interrupt-parent = <&ipcc_mproc>; interrupts = <IPCC_CLIENT_SPSS IPCC_MPROC_SIGNAL_TZ IRQ_TYPE_LEVEL_HIGH>; label = "spss"; }; }; qcom,glink { compatible = "qcom,glink"; #address-cells = <1>; #size-cells = <1>; ranges; glink_adsp: adsp { qcom,remote-pid = <2>; transport = "smem"; mboxes = <&ipcc_mproc IPCC_CLIENT_LPASS IPCC_MPROC_SIGNAL_GLINK_QMP>; mbox-names = "adsp_smem"; interrupt-parent = <&ipcc_mproc>; interrupts = <IPCC_CLIENT_LPASS IPCC_MPROC_SIGNAL_GLINK_QMP IRQ_TYPE_EDGE_RISING>; label = "adsp"; qcom,glink-label = "lpass"; cpu-affinity = <1 2>; qcom,adsp_qrtr { qcom,glink-channels = "IPCRTR"; qcom,intents = <0x800 5 0x2000 3 0x4400 2>; }; qcom,apr_tal_rpmsg { qcom,glink-channels = "apr_audio_svc"; qcom,intents = <0x200 20>; }; qcom,msm_fastrpc_rpmsg { compatible = "qcom,msm-fastrpc-rpmsg"; qcom,glink-channels = "fastrpcglink-apps-dsp"; qcom,intents = <0x64 64>; }; qcom,adsp_glink_ssr { qcom,glink-channels = "glink_ssr"; qcom,notify-edges = <&glink_cdsp>; }; }; glink_cdsp: cdsp { qcom,remote-pid = <5>; transport = "smem"; mboxes = <&ipcc_mproc IPCC_CLIENT_CDSP IPCC_MPROC_SIGNAL_GLINK_QMP>; mbox-names = "cdsp_smem"; interrupt-parent = <&ipcc_mproc>; interrupts = <IPCC_CLIENT_CDSP IPCC_MPROC_SIGNAL_GLINK_QMP IRQ_TYPE_EDGE_RISING>; label = "cdsp"; qcom,glink-label = "cdsp"; qcom,cdsp_qrtr { qcom,glink-channels = "IPCRTR"; qcom,intents = <0x800 5 0x2000 3 0x4400 2>; }; qcom,msm_fastrpc_rpmsg { compatible = "qcom,msm-fastrpc-rpmsg"; qcom,glink-channels = "fastrpcglink-apps-dsp"; qcom,intents = <0x64 64>; }; qcom,msm_cdsprm_rpmsg { compatible = "qcom,msm-cdsprm-rpmsg"; qcom,glink-channels = "cdsprmglink-apps-dsp"; qcom,intents = <0x20 12>; msm_cdsp_rm: qcom,msm_cdsp_rm { compatible = "qcom,msm-cdsp-rm"; qcom,qos-latency-us = <44>; qcom,qos-maxhold-ms = <20>; qcom,compute-cx-limit-en; qcom,compute-priority-mode = <2>; #cooling-cells = <2>; }; }; qcom,cdsp_glink_ssr { qcom,glink-channels = "glink_ssr"; qcom,notify-edges = <&glink_adsp>; }; }; }; qcom,glinkpkt { compatible = "qcom,glinkpkt"; qcom,glinkpkt-apr-apps2 { qcom,glinkpkt-edge = "adsp"; qcom,glinkpkt-ch-name = "apr_apps2"; qcom,glinkpkt-dev-name = "apr_apps2"; }; }; }; #include "direwolf-pinctrl.dtsi" Loading @@ -1633,6 +1767,7 @@ #include "msm-arm-smmu-direwolf.dtsi" #include "direwolf-qupv3.dtsi" #include "direwolf-usb.dtsi" #include "direwolf-smp2p.dtsi" &gcc_emac0_gdsc { status = "ok"; Loading Loading
qcom/direwolf-smp2p.dtsi 0 → 100644 +76 −0 Original line number Diff line number Diff line #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/soc/qcom,ipcc.h> &soc { qcom,smp2p-adsp { compatible = "qcom,smp2p"; qcom,smem = <443>, <429>; interrupt-parent = <&ipcc_mproc>; interrupts = <IPCC_CLIENT_LPASS IPCC_MPROC_SIGNAL_SMP2P IRQ_TYPE_EDGE_RISING>; mboxes = <&ipcc_mproc IPCC_CLIENT_LPASS IPCC_MPROC_SIGNAL_SMP2P>; qcom,local-pid = <0>; qcom,remote-pid = <2>; adsp_smp2p_out: master-kernel { qcom,entry-name = "master-kernel"; #qcom,smem-state-cells = <1>; }; adsp_smp2p_in: slave-kernel { qcom,entry-name = "slave-kernel"; interrupt-controller; #interrupt-cells = <2>; }; smp2p_rdbg2_out: qcom,smp2p-rdbg2-out { qcom,entry-name = "rdbg"; #qcom,smem-state-cells = <1>; }; smp2p_rdbg2_in: qcom,smp2p-rdbg2-in { qcom,entry-name = "rdbg"; interrupt-controller; #interrupt-cells = <2>; }; }; qcom,smp2p-cdsp@1799000c { compatible = "qcom,smp2p"; qcom,smem = <94>, <432>; interrupt-parent = <&ipcc_mproc>; interrupts = <IPCC_CLIENT_CDSP IPCC_MPROC_SIGNAL_SMP2P IRQ_TYPE_EDGE_RISING>; mboxes = <&ipcc_mproc IPCC_CLIENT_CDSP IPCC_MPROC_SIGNAL_SMP2P>; qcom,local-pid = <0>; qcom,remote-pid = <5>; cdsp_smp2p_out: master-kernel { qcom,entry-name = "master-kernel"; #qcom,smem-state-cells = <1>; }; cdsp_smp2p_in: slave-kernel { qcom,entry-name = "slave-kernel"; interrupt-controller; #interrupt-cells = <2>; }; smp2p_rdbg5_out: qcom,smp2p-rdbg5-out { qcom,entry-name = "rdbg"; #qcom,smem-state-cells = <1>; }; smp2p_rdbg5_in: qcom,smp2p-rdbg5-in { qcom,entry-name = "rdbg"; interrupt-controller; #interrupt-cells = <2>; }; smp2p_qvrexternal5_out: qcom,smp2p-qvrexternal5-out { qcom,entry-name = "qvrexternal"; #qcom,smem-state-cells = <1>; }; }; };
qcom/direwolf.dtsi +135 −0 Original line number Diff line number Diff line Loading @@ -1623,6 +1623,140 @@ < 3000000 2 >; }; }; tcsr_mutex_block: syscon@1f40000 { compatible = "syscon"; reg = <0x1f40000 0x20000>; }; tcsr_mutex: hwlock@1f40000 { compatible = "qcom,tcsr-mutex"; syscon = <&tcsr_mutex_block 0 0x1000>; #hwlock-cells = <1>; }; smem: qcom,smem { compatible = "qcom,smem"; memory-region = <&smem_mem>; hwlocks = <&tcsr_mutex 3>; }; qcom,qsee_ipc_irq_bridge { compatible = "qcom,qsee-ipc-irq-bridge"; qcom,qsee-ipc-irq-spss { qcom,dev-name = "qsee_ipc_irq_spss"; interrupt-parent = <&ipcc_mproc>; interrupts = <IPCC_CLIENT_SPSS IPCC_MPROC_SIGNAL_TZ IRQ_TYPE_LEVEL_HIGH>; label = "spss"; }; }; qcom,glink { compatible = "qcom,glink"; #address-cells = <1>; #size-cells = <1>; ranges; glink_adsp: adsp { qcom,remote-pid = <2>; transport = "smem"; mboxes = <&ipcc_mproc IPCC_CLIENT_LPASS IPCC_MPROC_SIGNAL_GLINK_QMP>; mbox-names = "adsp_smem"; interrupt-parent = <&ipcc_mproc>; interrupts = <IPCC_CLIENT_LPASS IPCC_MPROC_SIGNAL_GLINK_QMP IRQ_TYPE_EDGE_RISING>; label = "adsp"; qcom,glink-label = "lpass"; cpu-affinity = <1 2>; qcom,adsp_qrtr { qcom,glink-channels = "IPCRTR"; qcom,intents = <0x800 5 0x2000 3 0x4400 2>; }; qcom,apr_tal_rpmsg { qcom,glink-channels = "apr_audio_svc"; qcom,intents = <0x200 20>; }; qcom,msm_fastrpc_rpmsg { compatible = "qcom,msm-fastrpc-rpmsg"; qcom,glink-channels = "fastrpcglink-apps-dsp"; qcom,intents = <0x64 64>; }; qcom,adsp_glink_ssr { qcom,glink-channels = "glink_ssr"; qcom,notify-edges = <&glink_cdsp>; }; }; glink_cdsp: cdsp { qcom,remote-pid = <5>; transport = "smem"; mboxes = <&ipcc_mproc IPCC_CLIENT_CDSP IPCC_MPROC_SIGNAL_GLINK_QMP>; mbox-names = "cdsp_smem"; interrupt-parent = <&ipcc_mproc>; interrupts = <IPCC_CLIENT_CDSP IPCC_MPROC_SIGNAL_GLINK_QMP IRQ_TYPE_EDGE_RISING>; label = "cdsp"; qcom,glink-label = "cdsp"; qcom,cdsp_qrtr { qcom,glink-channels = "IPCRTR"; qcom,intents = <0x800 5 0x2000 3 0x4400 2>; }; qcom,msm_fastrpc_rpmsg { compatible = "qcom,msm-fastrpc-rpmsg"; qcom,glink-channels = "fastrpcglink-apps-dsp"; qcom,intents = <0x64 64>; }; qcom,msm_cdsprm_rpmsg { compatible = "qcom,msm-cdsprm-rpmsg"; qcom,glink-channels = "cdsprmglink-apps-dsp"; qcom,intents = <0x20 12>; msm_cdsp_rm: qcom,msm_cdsp_rm { compatible = "qcom,msm-cdsp-rm"; qcom,qos-latency-us = <44>; qcom,qos-maxhold-ms = <20>; qcom,compute-cx-limit-en; qcom,compute-priority-mode = <2>; #cooling-cells = <2>; }; }; qcom,cdsp_glink_ssr { qcom,glink-channels = "glink_ssr"; qcom,notify-edges = <&glink_adsp>; }; }; }; qcom,glinkpkt { compatible = "qcom,glinkpkt"; qcom,glinkpkt-apr-apps2 { qcom,glinkpkt-edge = "adsp"; qcom,glinkpkt-ch-name = "apr_apps2"; qcom,glinkpkt-dev-name = "apr_apps2"; }; }; }; #include "direwolf-pinctrl.dtsi" Loading @@ -1633,6 +1767,7 @@ #include "msm-arm-smmu-direwolf.dtsi" #include "direwolf-qupv3.dtsi" #include "direwolf-usb.dtsi" #include "direwolf-smp2p.dtsi" &gcc_emac0_gdsc { status = "ok"; Loading