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Commit 411c8026 authored by Colin Xu's avatar Colin Xu Committed by Greg Kroah-Hartman
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drm/i915/gvt: Fix two CFL MMIO handling caused by regression. 



commit fccd0f7cf4d532674d727c7f204f038456675dee upstream.

D_CFL was incorrectly removed for:
GAMT_CHKN_BIT_REG
GEN9_CTX_PREEMPT_REG

V2: Update commit message.
V3: Rebase and split Fixes and mis-handled MMIO.

Fixes: 43226e6f (drm/i915/gvt: replaced register address with name)
Reviewed-by: default avatarZhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: default avatarColin Xu <colin.xu@intel.com>
Signed-off-by: default avatarZhenyu Wang <zhenyuw@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20200601030638.16002-1-colin.xu@intel.com


Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 517708c4

drivers/gpu/drm/i915/gvt/handlers.c

+2 −2
Original line number Diff line number Diff line
@@ -3103,8 +3103,8 @@ static int init_skl_mmio_info(struct intel_gvt *gvt) 
	MMIO_DFH(GEN9_WM_CHICKEN3, D_SKL_PLUS, F_MODE_MASK | F_CMD_ACCESS,

		 NULL, NULL);



	MMIO_D(GAMT_CHKN_BIT_REG, D_KBL);

	MMIO_D(GEN9_CTX_PREEMPT_REG, D_KBL | D_SKL);

	MMIO_D(GAMT_CHKN_BIT_REG, D_KBL | D_CFL);

	MMIO_D(GEN9_CTX_PREEMPT_REG, D_SKL_PLUS);



	return 0;

}