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Commit 4105d9d6 authored by Andy Gross's avatar Andy Gross Committed by Olof Johansson
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arm: dts: qcom: Add TCSR support for APQ8064



This patch adds TCSR support for use by the GSBI to automatically
configure ADM CRCI values based on the GSBI port configuration.

Signed-off-by: default avatarAndy Gross <agross@codeaurora.org>
Signed-off-by: default avatarKumar Gala <galak@codeaurora.org>
Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parent a8b21018
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+14 −0
Original line number Diff line number Diff line
@@ -166,6 +166,7 @@
		gsbi1: gsbi@12440000 {
			status = "disabled";
			compatible = "qcom,gsbi-v1.0.0";
			cell-index = <1>;
			reg = <0x12440000 0x100>;
			clocks = <&gcc GSBI1_H_CLK>;
			clock-names = "iface";
@@ -173,6 +174,8 @@
			#size-cells = <1>;
			ranges;

			syscon-tcsr = <&tcsr>;

			i2c1: i2c@12460000 {
				compatible = "qcom,i2c-qup-v1.1.1";
				reg = <0x12460000 0x1000>;
@@ -187,6 +190,7 @@
		gsbi2: gsbi@12480000 {
			status = "disabled";
			compatible = "qcom,gsbi-v1.0.0";
			cell-index = <2>;
			reg = <0x12480000 0x100>;
			clocks = <&gcc GSBI2_H_CLK>;
			clock-names = "iface";
@@ -194,6 +198,8 @@
			#size-cells = <1>;
			ranges;

			syscon-tcsr = <&tcsr>;

			i2c2: i2c@124a0000 {
				compatible = "qcom,i2c-qup-v1.1.1";
				reg = <0x124a0000 0x1000>;
@@ -208,6 +214,7 @@
		gsbi7: gsbi@16600000 {
			status = "disabled";
			compatible = "qcom,gsbi-v1.0.0";
			cell-index = <7>;
			reg = <0x16600000 0x100>;
			clocks = <&gcc GSBI7_H_CLK>;
			clock-names = "iface";
@@ -215,6 +222,8 @@
			#size-cells = <1>;
			ranges;

			syscon-tcsr = <&tcsr>;

			serial@16640000 {
				compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
				reg = <0x16640000 0x1000>,
@@ -349,5 +358,10 @@
				pinctrl-0 = <&sdc4_gpios>;
			};
		};

		tcsr: syscon@1a400000 {
			compatible = "qcom,tcsr-apq8064", "syscon";
			reg = <0x1a400000 0x100>;
		};
	};
};