Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 409ec8db authored by Russell King's avatar Russell King
Browse files

dmaengine: PL08x: move the bus and increment selection to dma prepare function



Move the bus and transfer increment selection to the DMA prepare
function rather than the slave configuration function.

Acked-by: default avatarLinus Walleij <linus.walleij@linaro.org>
Tested-by: default avatarLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent 95442b22
Loading
Loading
Loading
Loading
+14 −12
Original line number Original line Diff line number Diff line
@@ -1258,13 +1258,9 @@ static int dma_set_runtime_config(struct dma_chan *chan,
	cctl |= burst << PL080_CONTROL_DB_SIZE_SHIFT;
	cctl |= burst << PL080_CONTROL_DB_SIZE_SHIFT;


	if (plchan->runtime_direction == DMA_DEV_TO_MEM) {
	if (plchan->runtime_direction == DMA_DEV_TO_MEM) {
		plchan->src_cctl = pl08x_cctl(cctl) | PL080_CONTROL_DST_INCR |
		plchan->src_cctl = pl08x_cctl(cctl);
			pl08x_select_bus(plchan->cd->periph_buses,
					 pl08x->mem_buses);
	} else {
	} else {
		plchan->dst_cctl = pl08x_cctl(cctl) | PL080_CONTROL_SRC_INCR |
		plchan->dst_cctl = pl08x_cctl(cctl);
			pl08x_select_bus(pl08x->mem_buses,
					 plchan->cd->periph_buses);
	}
	}


	dev_dbg(&pl08x->adev->dev,
	dev_dbg(&pl08x->adev->dev,
@@ -1451,6 +1447,8 @@ static struct dma_async_tx_descriptor *pl08x_prep_slave_sg(
	struct scatterlist *sg;
	struct scatterlist *sg;
	dma_addr_t slave_addr;
	dma_addr_t slave_addr;
	int ret, tmp;
	int ret, tmp;
	u8 src_buses, dst_buses;
	u32 cctl;


	dev_dbg(&pl08x->adev->dev, "%s prepare transaction of %d bytes from %s\n",
	dev_dbg(&pl08x->adev->dev, "%s prepare transaction of %d bytes from %s\n",
			__func__, sg_dma_len(sgl), plchan->name);
			__func__, sg_dma_len(sgl), plchan->name);
@@ -1474,11 +1472,15 @@ static struct dma_async_tx_descriptor *pl08x_prep_slave_sg(
	txd->direction = direction;
	txd->direction = direction;


	if (direction == DMA_MEM_TO_DEV) {
	if (direction == DMA_MEM_TO_DEV) {
		txd->cctl = plchan->dst_cctl;
		cctl = plchan->dst_cctl | PL080_CONTROL_SRC_INCR;
		slave_addr = plchan->cfg.dst_addr;
		slave_addr = plchan->cfg.dst_addr;
		src_buses = pl08x->mem_buses;
		dst_buses = plchan->cd->periph_buses;
	} else if (direction == DMA_DEV_TO_MEM) {
	} else if (direction == DMA_DEV_TO_MEM) {
		txd->cctl = plchan->src_cctl;
		cctl = plchan->src_cctl | PL080_CONTROL_DST_INCR;
		slave_addr = plchan->cfg.src_addr;
		slave_addr = plchan->cfg.src_addr;
		src_buses = plchan->cd->periph_buses;
		dst_buses = pl08x->mem_buses;
	} else {
	} else {
		pl08x_free_txd(pl08x, txd);
		pl08x_free_txd(pl08x, txd);
		dev_err(&pl08x->adev->dev,
		dev_err(&pl08x->adev->dev,
@@ -1486,6 +1488,8 @@ static struct dma_async_tx_descriptor *pl08x_prep_slave_sg(
		return NULL;
		return NULL;
	}
	}


	txd->cctl = cctl | pl08x_select_bus(src_buses, dst_buses);

	if (plchan->cfg.device_fc)
	if (plchan->cfg.device_fc)
		tmp = (direction == DMA_MEM_TO_DEV) ? PL080_FLOW_MEM2PER_PER :
		tmp = (direction == DMA_MEM_TO_DEV) ? PL080_FLOW_MEM2PER_PER :
			PL080_FLOW_PER2MEM_PER;
			PL080_FLOW_PER2MEM_PER;
@@ -1785,10 +1789,8 @@ static void pl08x_dma_slave_init(struct pl08x_dma_chan *chan)
	chan->name = chan->cd->bus_id;
	chan->name = chan->cd->bus_id;
	chan->cfg.src_addr = chan->cd->addr;
	chan->cfg.src_addr = chan->cd->addr;
	chan->cfg.dst_addr = chan->cd->addr;
	chan->cfg.dst_addr = chan->cd->addr;
	chan->src_cctl = cctl | PL080_CONTROL_DST_INCR |
	chan->src_cctl = cctl;
		pl08x_select_bus(chan->cd->periph_buses, chan->host->mem_buses);
	chan->dst_cctl = cctl;
	chan->dst_cctl = cctl | PL080_CONTROL_SRC_INCR |
		pl08x_select_bus(chan->host->mem_buses, chan->cd->periph_buses);
}
}


/*
/*