Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 40462179 authored by Philipp Zabel's avatar Philipp Zabel Committed by Lucas Stach
Browse files

drm/etnaviv: reduce reset delay



After reset assertion, we only have to wait for the reset signals to
propagate through the GPU before deasserting the reset again. A few
hundred clock cycles should be more than enough. Replace the msleep(1),
which can actually take about 30 ms on i.MX6Q in some configurations,
with an usleep_range of a few microseconds. If the delay was too short,
the FE would not be idle afterwards, and the reset would be retried.

Signed-off-by: default avatarPhilipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: default avatarLucas Stach <l.stach@pengutronix.de>
parent 13cde9f4
Loading
Loading
Loading
Loading
+1 −1
Original line number Diff line number Diff line
@@ -456,7 +456,7 @@ static int etnaviv_hw_reset(struct etnaviv_gpu *gpu)
		gpu_write(gpu, VIVS_HI_CLOCK_CONTROL, control);

		/* wait for reset. */
		msleep(1);
		usleep_range(10, 20);

		/* reset soft reset bit. */
		control &= ~VIVS_HI_CLOCK_CONTROL_SOFT_RESET;