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Commit 403936bb authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'renesas-dt-for-v4.10' of... 

Merge tag 'renesas-dt-for-v4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt

Renesas ARM Based SoC DT Updates for v4.10

Clean-Ups and Corrections:
* Removed Z clock from r8a7794 SoC; it is not present in hardware
* Use generic pinctrl properties in SDHI nodes in gose board
* Correct W=1 dtc warnings on r8a7794 SoC
* Correct DU reg property on r8a7779 SoC
* Correct SCIFB reg properties to cover all registers

Enhancements:
* Configure pinmuxing for the DU0 input clock on the Marzen board
* Enable VIN 0 - 2 on r8a7793 SoC
* Enable HDMI input on Koelsch and Lager boards
* Enable SDHI1 on rskrza1 board
* Add MMCIF nodes to r7s72100 SoC
* Add MSIOF clocks to r8a7792 SoC
* Enable UHS for SDHI 0 & 1 on koelsch and alt boards

* tag 'renesas-dt-for-v4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas

: (29 commits)
  ARM: dts: r8a7794: remove Z clock
  ARM: dts: r8a7779: marzen: Configure pinmuxing for the DU0 input clock
  ARM: dts: sh73a0: Remove skeleton.dtsi inclusion
  ARM: dts: r8a7740: Remove skeleton.dtsi inclusion
  ARM: dts: r8a7779: Remove skeleton.dtsi inclusion
  ARM: dts: r8a7778: Remove skeleton.dtsi inclusion
  ARM: dts: emev2: Remove skeleton.dtsi inclusion
  ARM: dts: r8a7779: Fix DU reg property
  ARM: dts: r8a7793: Enable VIN0-VIN2
  ARM: dts: koelsch: add HDMI input
  ARM: dts: lager: Add entries for VIN HDMI input support
  ARM: dts: rskrza1: add sdhi1 DT support
  ARM: dts: r7s72100: add sdhi to device tree
  ARM: dts: r8a7794: Fix W=1 dtc warnings
  ARM: dts: gose: use generic pinctrl properties in SDHI nodes
  ARM: dts: r7s72100: add sdhi clock to device tree
  ARM: dts: r7s72100: add mmcif to device tree
  ARM: dts: r8a7792: add MSIOF support
  ARM: dts: r8a7792: add MSIOF clocks
  ARM: dts: wheat: add DU support
  ...

Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents 20e3ecd7 68cc085a

arch/arm/boot/dts/emev2.dtsi

+2 −1
Original line number Diff line number Diff line
@@ -8,13 +8,14 @@ 
 * kind, whether express or implied.

 */



#include "skeleton.dtsi"

#include <dt-bindings/interrupt-controller/arm-gic.h>

#include <dt-bindings/interrupt-controller/irq.h>



/ {

	compatible = "renesas,emev2";

	interrupt-parent = <&gic>;

	#address-cells = <1>;

	#size-cells = <1>;



	aliases {

		gpio0 = &gpio0;

arch/arm/boot/dts/r7s72100-rskrza1.dts

+5 −0
Original line number Diff line number Diff line
@@ -56,6 +56,11 @@ 
	};

};



&sdhi1 {

	bus-width = <4>;

	status = "okay";

};



&scif2 {

	status = "okay";

};

arch/arm/boot/dts/r7s72100.dtsi

+55 −0
Original line number Diff line number Diff line
@@ -117,6 +117,15 @@ 
			clock-output-names = "ether";

		};



		mstp8_clks: mstp8_clks@fcfe0434 {

			#clock-cells = <1>;

			compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";

			reg = <0xfcfe0434 4>;

			clocks = <&p1_clk>;

			clock-indices = <R7S72100_CLK_MMCIF>;

			clock-output-names = "mmcif";

		};



		mstp9_clks: mstp9_clks@fcfe0438 {

			#clock-cells = <1>;

			compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
@@ -140,6 +149,14 @@ 
			>;

			clock-output-names = "spi0", "spi1", "spi2", "spi3", "spi4";

		};

		mstp12_clks: mstp12_clks@fcfe0444 {

			#clock-cells = <1>;

			compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";

			reg = <0xfcfe0444 4>;

			clocks = <&p1_clk>, <&p1_clk>;

			clock-indices = <R7S72100_CLK_SDHI1 R7S72100_CLK_SDHI0>;

			clock-output-names = "sdhi1", "sdhi0";

		};

	};



	cpus {
@@ -441,4 +458,42 @@ 
		#size-cells = <0>;

		status = "disabled";

	};



	mmcif: mmc@e804c800 {

		compatible = "renesas,mmcif-r7s72100", "renesas,sh-mmcif";

		reg = <0xe804c800 0x80>;

		interrupts = <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH

			      GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH

			      GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&mstp8_clks R7S72100_CLK_MMCIF>;

		reg-io-width = <4>;

		bus-width = <8>;

		status = "disabled";

	};



	sdhi0: sd@e804e000 {

		compatible = "renesas,sdhi-r7s72100";

		reg = <0xe804e000 0x100>;

		interrupts = <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH

			      GIC_SPI 271 IRQ_TYPE_LEVEL_HIGH

			      GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;



		clocks = <&mstp12_clks R7S72100_CLK_SDHI0>;

		cap-sd-highspeed;

		cap-sdio-irq;

		status = "disabled";

	};



	sdhi1: sd@e804e800 {

		compatible = "renesas,sdhi-r7s72100";

		reg = <0xe804e800 0x100>;

		interrupts = <GIC_SPI 273 IRQ_TYPE_LEVEL_HIGH

			      GIC_SPI 274 IRQ_TYPE_LEVEL_HIGH

			      GIC_SPI 275 IRQ_TYPE_LEVEL_HIGH>;



		clocks = <&mstp12_clks R7S72100_CLK_SDHI1>;

		cap-sd-highspeed;

		cap-sdio-irq;

		status = "disabled";

	};

};

arch/arm/boot/dts/r8a7740.dtsi

+2 −2
Original line number Diff line number Diff line
@@ -8,8 +8,6 @@ 
 * kind, whether express or implied.

 */



/include/ "skeleton.dtsi"



#include <dt-bindings/clock/r8a7740-clock.h>

#include <dt-bindings/interrupt-controller/arm-gic.h>

#include <dt-bindings/interrupt-controller/irq.h>
@@ -17,6 +15,8 @@ 
/ {

	compatible = "renesas,r8a7740";

	interrupt-parent = <&gic>;

	#address-cells = <1>;

	#size-cells = <1>;



	cpus {

		#address-cells = <1>;

arch/arm/boot/dts/r8a7778.dtsi

+2 −2
Original line number Diff line number Diff line
@@ -14,8 +14,6 @@ 
 * kind, whether express or implied.

 */



/include/ "skeleton.dtsi"



#include <dt-bindings/clock/r8a7778-clock.h>

#include <dt-bindings/interrupt-controller/arm-gic.h>

#include <dt-bindings/interrupt-controller/irq.h>
@@ -23,6 +21,8 @@ 
/ {

	compatible = "renesas,r8a7778";

	interrupt-parent = <&gic>;

	#address-cells = <1>;

	#size-cells = <1>;



	cpus {

		#address-cells = <1>;