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Commit 40058337 authored by Christophe Leroy's avatar Christophe Leroy Committed by Michael Ellerman
Browse files

powerpc: simplify BDI switch 



There is no reason to re-read each time the pointer at
location 0xf0 as it is fixed and known.

Signed-off-by: default avatarChristophe Leroy <christophe.leroy@c-s.fr>
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
parent 36da5ff0

arch/powerpc/include/asm/mmu.h

+2 −0
Original line number Diff line number Diff line
@@ -356,6 +356,8 @@ extern void early_init_mmu_secondary(void); 
extern void setup_initial_memory_limit(phys_addr_t first_memblock_base,

				       phys_addr_t first_memblock_size);

static inline void mmu_early_init_devtree(void) { }



extern void *abatron_pteptrs[2];

#endif /* __ASSEMBLY__ */

#endif

arch/powerpc/kernel/head_32.S

+2 −3
Original line number Diff line number Diff line
@@ -1027,9 +1027,8 @@ _ENTRY(switch_mmu_context) 
	 * The PGDIR is passed as second argument.

	 */

	lwz	r4,MM_PGD(r4)

	lis	r5, KERNELBASE@h

	lwz	r5, 0xf0(r5)

	stw	r4, 0x4(r5)

	lis	r5, abatron_pteptrs@ha

	stw	r4, abatron_pteptrs@l + 0x4(r5)

#endif

	li	r4,0

	isync

arch/powerpc/kernel/head_40x.S

+2 −3
Original line number Diff line number Diff line
@@ -953,9 +953,8 @@ _GLOBAL(set_context) 
	/* Context switch the PTE pointer for the Abatron BDI2000.

	 * The PGDIR is the second parameter.

	 */

	lis	r5, KERNELBASE@h

	lwz	r5, 0xf0(r5)

	stw	r4, 0x4(r5)

	lis	r5, abatron_pteptrs@ha

	stw	r4, abatron_pteptrs@l + 0x4(r5)

#endif

	sync

	mtspr	SPRN_PID,r3

arch/powerpc/kernel/head_8xx.S

+1 −0
Original line number Diff line number Diff line
@@ -989,5 +989,6 @@ swapper_pg_dir: 
/* Room for two PTE table poiners, usually the kernel and current user

 * pointer to their respective root page table (pgdir).

 */

	.globl	abatron_pteptrs

abatron_pteptrs:

	.space	8

arch/powerpc/mm/8xx_mmu.c

+2 −5
Original line number Diff line number Diff line
@@ -162,14 +162,11 @@ void set_context(unsigned long id, pgd_t *pgd) 
{

	s16 offset = (s16)(__pa(swapper_pg_dir));



#ifdef CONFIG_BDI_SWITCH

	pgd_t	**ptr = *(pgd_t ***)(KERNELBASE + 0xf0);



	/* Context switch the PTE pointer for the Abatron BDI2000.

	 * The PGDIR is passed as second argument.

	 */

	*(ptr + 1) = pgd;

#endif

	if (IS_ENABLED(CONFIG_BDI_SWITCH))

		abatron_pteptrs[1] = pgd;



	/* Register M_TWB will contain base address of level 1 table minus the

	 * lower part of the kernel PGDIR base address, so that all accesses to