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Commit 3f9eaf09 authored by Santosh Shilimkar's avatar Santosh Shilimkar Committed by Tony Lindgren
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omap4: Add smc API to read AuxCoreBoot0 register 



This patch adds a secure API to read AuxCoreBoot0 register to
check the cpu boot status. It also moves the other smc APIs
to common omap44xx-smc.S. This APIs should not be marked as
__INIT because we need these to be present for CPU hotplug

Signed-off-by: default avatarSantosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
parent 5643aebb

arch/arm/mach-omap2/omap-headsmp.S

+0 −16
Original line number Diff line number Diff line
@@ -47,19 +47,3 @@ hold: ldr r12,=0x103 
	b	secondary_startup

END(omap_secondary_startup)



ENTRY(omap_modify_auxcoreboot0)

	stmfd   sp!, {r1-r12, lr}

	ldr	r12, =0x104

	dsb

	smc	#0

	ldmfd   sp!, {r1-r12, pc}

END(omap_modify_auxcoreboot0)



ENTRY(omap_auxcoreboot_addr)

	stmfd   sp!, {r2-r12, lr}

	ldr	r12, =0x105

	dsb

	smc	#0

	ldmfd   sp!, {r2-r12, pc}

END(omap_auxcoreboot_addr)

arch/arm/mach-omap2/omap44xx-smc.S

+25 −0
Original line number Diff line number Diff line
@@ -30,3 +30,28 @@ ENTRY(omap_smc1) 
	smc	#0

	ldmfd   sp!, {r2-r12, pc}

END(omap_smc1)



ENTRY(omap_modify_auxcoreboot0)

	stmfd   sp!, {r1-r12, lr}

	ldr	r12, =0x104

	dsb

	smc	#0

	ldmfd   sp!, {r1-r12, pc}

END(omap_modify_auxcoreboot0)



ENTRY(omap_auxcoreboot_addr)

	stmfd   sp!, {r2-r12, lr}

	ldr	r12, =0x105

	dsb

	smc	#0

	ldmfd   sp!, {r2-r12, pc}

END(omap_auxcoreboot_addr)



ENTRY(omap_read_auxcoreboot0)

	stmfd   sp!, {r2-r12, lr}

	ldr	r12, =0x103

	dsb

	smc	#0

	mov	r0, r0, lsr #9

	ldmfd   sp!, {r2-r12, pc}

END(omap_read_auxcoreboot0)

arch/arm/plat-omap/include/plat/smp.h

+1 −0
Original line number Diff line number Diff line
@@ -30,6 +30,7 @@ 
extern void omap_secondary_startup(void);

extern u32 omap_modify_auxcoreboot0(u32 set_mask, u32 clear_mask);

extern void omap_auxcoreboot_addr(u32 cpu_addr);

extern u32 omap_read_auxcoreboot0(void);



/*

 * We use Soft IRQ1 as the IPI