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Commit 3f47de2c authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'samsung-dt-4.21-2' of... 

Merge tag 'samsung-dt-4.21-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/dt

Samsung DTS ARM changes for v4.21, part 2

1. Add missing CPUs in cooling maps for Odroid X2 (missed in previous
   round of fixups).
2. Fix clock configuration in audio subsystem on Odroid XU3/XU4.

* tag 'samsung-dt-4.21-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux

:
  ARM: dts: exynos: Specify I2S assigned clocks in proper node
  ARM: dts: exynos: Add missing CPUs in cooling maps for Odroid X2

Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents bda090cf 8ac686d7

arch/arm/boot/dts/exynos4412-prime.dtsi

+4 −2
Original line number Diff line number Diff line
@@ -30,9 +30,11 @@ 
};



&cooling_map0 {

	cooling-device = <&cpu0 9 9>;

	cooling-device = <&cpu0 9 9>, <&cpu1 9 9>,

			 <&cpu2 9 9>, <&cpu3 9 9>;

};



&cooling_map1 {

	cooling-device = <&cpu0 15 15>;

	cooling-device = <&cpu0 15 15>, <&cpu1 15 15>,

			 <&cpu2 15 15>, <&cpu3 15 15>;

};

arch/arm/boot/dts/exynos5422-odroidxu3-audio.dtsi

+4 −5
Original line number Diff line number Diff line
@@ -26,8 +26,7 @@ 
			"Speakers", "SPKL",

			"Speakers", "SPKR";



		assigned-clocks = <&i2s0 CLK_I2S_RCLK_SRC>,

				<&clock CLK_MOUT_EPLL>,

		assigned-clocks = <&clock CLK_MOUT_EPLL>,

				<&clock CLK_MOUT_MAU_EPLL>,

				<&clock CLK_MOUT_USER_MAU_EPLL>,

				<&clock_audss EXYNOS_MOUT_AUDSS>,
@@ -36,8 +35,7 @@ 
				<&clock_audss EXYNOS_DOUT_AUD_BUS>,

				<&clock_audss EXYNOS_DOUT_I2S>;



		assigned-clock-parents = <&clock_audss EXYNOS_SCLK_I2S>,

				<&clock CLK_FOUT_EPLL>,

		assigned-clock-parents = <&clock CLK_FOUT_EPLL>,

				<&clock CLK_MOUT_EPLL>,

				<&clock CLK_MOUT_MAU_EPLL>,

				<&clock CLK_MAU_EPLL>,
@@ -48,7 +46,6 @@ 
				<0>,

				<0>,

				<0>,

				<0>,

				<196608001>,

				<(196608002 / 2)>,

				<196608000>;
@@ -84,4 +81,6 @@ 


&i2s0 {

	status = "okay";

	assigned-clocks = <&i2s0 CLK_I2S_RCLK_SRC>;

	assigned-clock-parents = <&clock_audss EXYNOS_SCLK_I2S>;

};

arch/arm/boot/dts/exynos5422-odroidxu4.dts

+4 −5
Original line number Diff line number Diff line
@@ -33,8 +33,7 @@ 
		compatible = "samsung,odroid-xu3-audio";

		model = "Odroid-XU4";



		assigned-clocks = <&i2s0 CLK_I2S_RCLK_SRC>,

				<&clock CLK_MOUT_EPLL>,

		assigned-clocks = <&clock CLK_MOUT_EPLL>,

				<&clock CLK_MOUT_MAU_EPLL>,

				<&clock CLK_MOUT_USER_MAU_EPLL>,

				<&clock_audss EXYNOS_MOUT_AUDSS>,
@@ -43,8 +42,7 @@ 
				<&clock_audss EXYNOS_DOUT_AUD_BUS>,

				<&clock_audss EXYNOS_DOUT_I2S>;



		assigned-clock-parents = <&clock_audss EXYNOS_SCLK_I2S>,

				<&clock CLK_FOUT_EPLL>,

		assigned-clock-parents = <&clock CLK_FOUT_EPLL>,

				<&clock CLK_MOUT_EPLL>,

				<&clock CLK_MOUT_MAU_EPLL>,

				<&clock CLK_MAU_EPLL>,
@@ -55,7 +53,6 @@ 
				<0>,

				<0>,

				<0>,

				<0>,

				<196608001>,

				<(196608002 / 2)>,

				<196608000>;
@@ -79,6 +76,8 @@ 


&i2s0 {

	status = "okay";

	assigned-clocks = <&i2s0 CLK_I2S_RCLK_SRC>;

	assigned-clock-parents = <&clock_audss EXYNOS_SCLK_I2S>;

};



&pwm {