Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 3f45d6a4 authored by Vivek Kumar's avatar Vivek Kumar Committed by Shreyas K K
Browse files

ARM: dts: msm: Add device node for llcc on sm8150 

Add device node for last level cache controller
on SM8150.

Change-Id: I408fa74757a016ac57263f292a14e134bab33697
parent bcd55c9c

bindings/arm/msm/qcom,llcc.txt

+1 −1
Original line number Diff line number Diff line
@@ -13,7 +13,7 @@ Properties: 
	Value type: <string>

	Definition: must be "qcom,sdm845-llcc" or "qcom,lahaina-llcc"

	            or "qcom,shima-llcc" or "qcom,sdxlemur-llcc"

	            or "qcom,yupik-llcc"

	            or "qcom,yupik-llcc" or "qcom,sm8150-llcc"

		    "qcom,llcc-v2" must be appended for V2 hardware.



- reg:

qcom/sm8150.dtsi

+7 −0
Original line number Diff line number Diff line
@@ -1950,6 +1950,13 @@ 
		qcom,firmware-name = "venus";

		memory-region = <&pil_video_mem>;

	};



	cache-controller@9200000 {

		compatible = "qcom,sm8150-llcc";

		reg = <0x9200000 0x1d0000> , <0x9600000 0x50000>;

		reg-names = "llcc_base", "llcc_broadcast_base";

		cap-based-alloc-and-pwr-collapse;

	};

};



&firmware {