Loading asoc/holi-port-config.h +12 −0 Original line number Diff line number Diff line Loading @@ -33,6 +33,16 @@ static struct port_params rx_frame_params_default[SWR_MSTR_PORT_LEN] = { {0x18F, 0, 0, 0x8, 0x8, 0x0F, 0x00, 0, 0, 0x00, 0x01}, /* PCM_OUT */ }; /* Headset(44.1K) + PCM Haptics */ static struct port_params rx_frame_params_44p1KHz[SWR_MSTR_PORT_LEN] = { {3, 0, 0, 0xFF, 0xFF, 1, 0xFF, 0xFF, 1, 0x00, 0x00}, /* HPH/EAR */ {63, 0, 0, 3, 6, 7, 0, 0xFF, 0, 0x00, 0x00}, /* HPH_CLH */ {31, 11, 11, 0xFF, 0xFF, 4, 1, 0xFF, 0, 0x00, 0x00}, /* HPH_CMP */ {3, 1, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0x01, 0, 0x00, 0x00}, /* LO/AUX */ {0, 0, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0, 0, 0x00, 0x00}, /* DSD */ {0x1FF, 0, 0, 0x8, 0x8, 0x0F, 0, 0, 0, 0x00, 0x01}, /* PCM_OUT */ }; /* TX UC1: TX1: 1ch, TX2: 2chs, TX3: 1ch(MBHC) */ static struct port_params tx_frame_params_default[SWR_MSTR_PORT_LEN] = { {3, 1, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0, 0x00, 0x00}, /* TX1 */ Loading @@ -50,12 +60,14 @@ static struct swr_mstr_port_map sm_port_map[] = { {VA_MACRO, SWR_UC0, tx_frame_params_default}, {RX_MACRO, SWR_UC0, rx_frame_params_default}, {RX_MACRO, SWR_UC1, rx_frame_params_dsd}, {RX_MACRO, SWR_UC2, rx_frame_params_44p1KHz}, }; static struct swr_mstr_port_map sm_port_map_wcd937x[] = { {VA_MACRO, SWR_UC0, tx_frame_params_wcd937x}, {RX_MACRO, SWR_UC0, rx_frame_params_default}, {RX_MACRO, SWR_UC1, rx_frame_params_dsd}, {RX_MACRO, SWR_UC2, rx_frame_params_44p1KHz}, }; #endif /* _HOLI_PORT_CONFIG */ asoc/lahaina-port-config.h +12 −0 Original line number Diff line number Diff line Loading @@ -44,6 +44,16 @@ static struct port_params rx_frame_params_default[SWR_MSTR_PORT_LEN] = { {0x18F, 0, 0, 0x8, 0x8, 0x0F, 0x00, 0, 0, 0x00, 0x01}, /* PCM_OUT */ }; /* Headset(44.1K) + PCM Haptics */ static struct port_params rx_frame_params_44p1KHz[SWR_MSTR_PORT_LEN] = { {3, 0, 0, 0xFF, 0xFF, 1, 0xFF, 0xFF, 1, 0x00, 0x00}, /* HPH/EAR */ {63, 0, 0, 3, 6, 7, 0, 0xFF, 0, 0x00, 0x00}, /* HPH_CLH */ {31, 11, 11, 0xFF, 0xFF, 4, 1, 0xFF, 0, 0x00, 0x00}, /* HPH_CMP */ {3, 1, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0x01, 0, 0x00, 0x00}, /* LO/AUX */ {0, 0, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0, 0, 0x00, 0x00}, /* DSD */ {0x1FF, 0, 0, 0x8, 0x8, 0x0F, 0, 0, 0, 0x00, 0x01}, /* PCM_OUT */ }; /* TX UC1: TX1: 1ch, TX2: 2chs, TX3: 1ch(MBHC) */ static struct port_params tx_frame_params_default[SWR_MSTR_PORT_LEN] = { {7, 1, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0, 0x00, 0x00}, /* TX1 */ Loading Loading @@ -92,6 +102,7 @@ static struct swr_mstr_port_map sm_port_map[] = { {TX_MACRO, SWR_UC2, tx_frame_params_0p6MHz}, {RX_MACRO, SWR_UC0, rx_frame_params_default}, {RX_MACRO, SWR_UC1, rx_frame_params_dsd}, {RX_MACRO, SWR_UC2, rx_frame_params_44p1KHz}, {WSA_MACRO, SWR_UC0, wsa_frame_params_default}, }; Loading @@ -101,6 +112,7 @@ static struct swr_mstr_port_map sm_port_map_shima[] = { {TX_MACRO, SWR_UC2, tx_frame_params_shima_0p6MHz}, {RX_MACRO, SWR_UC0, rx_frame_params_default}, {RX_MACRO, SWR_UC1, rx_frame_params_dsd}, {RX_MACRO, SWR_UC2, rx_frame_params_44p1KHz}, {WSA_MACRO, SWR_UC0, wsa_frame_params_default}, }; Loading include/soc/soundwire.h +1 −1 Original line number Diff line number Diff line Loading @@ -17,7 +17,7 @@ #define SWR_CLK_RATE_2P4MHZ 2400000 #define SWR_CLK_RATE_4P8MHZ 4800000 #define SWR_CLK_RATE_9P6MHZ 9600000 #define SWR_CLK_RATE_11P2896MHZ 1128960 #define SWR_CLK_RATE_11P2896MHZ 11289600 extern struct bus_type soundwire_type; struct swr_device; Loading soc/swr-mstr-ctrl.c +3 −0 Original line number Diff line number Diff line Loading @@ -752,6 +752,9 @@ static int swrm_get_port_config(struct swr_mstr_ctrl *swrm) if (swrm->mport_cfg[SWRM_DSD_PARAMS_PORT].port_en && (swrm->master_id == MASTER_ID_RX)) usecase = 1; else if ((swrm->master_id == MASTER_ID_RX) && (swrm->bus_clk == SWR_CLK_RATE_11P2896MHZ)) usecase = 2; if (swrm->bus_clk == SWR_CLK_RATE_4P8MHZ) usecase = 1; Loading Loading
asoc/holi-port-config.h +12 −0 Original line number Diff line number Diff line Loading @@ -33,6 +33,16 @@ static struct port_params rx_frame_params_default[SWR_MSTR_PORT_LEN] = { {0x18F, 0, 0, 0x8, 0x8, 0x0F, 0x00, 0, 0, 0x00, 0x01}, /* PCM_OUT */ }; /* Headset(44.1K) + PCM Haptics */ static struct port_params rx_frame_params_44p1KHz[SWR_MSTR_PORT_LEN] = { {3, 0, 0, 0xFF, 0xFF, 1, 0xFF, 0xFF, 1, 0x00, 0x00}, /* HPH/EAR */ {63, 0, 0, 3, 6, 7, 0, 0xFF, 0, 0x00, 0x00}, /* HPH_CLH */ {31, 11, 11, 0xFF, 0xFF, 4, 1, 0xFF, 0, 0x00, 0x00}, /* HPH_CMP */ {3, 1, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0x01, 0, 0x00, 0x00}, /* LO/AUX */ {0, 0, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0, 0, 0x00, 0x00}, /* DSD */ {0x1FF, 0, 0, 0x8, 0x8, 0x0F, 0, 0, 0, 0x00, 0x01}, /* PCM_OUT */ }; /* TX UC1: TX1: 1ch, TX2: 2chs, TX3: 1ch(MBHC) */ static struct port_params tx_frame_params_default[SWR_MSTR_PORT_LEN] = { {3, 1, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0, 0x00, 0x00}, /* TX1 */ Loading @@ -50,12 +60,14 @@ static struct swr_mstr_port_map sm_port_map[] = { {VA_MACRO, SWR_UC0, tx_frame_params_default}, {RX_MACRO, SWR_UC0, rx_frame_params_default}, {RX_MACRO, SWR_UC1, rx_frame_params_dsd}, {RX_MACRO, SWR_UC2, rx_frame_params_44p1KHz}, }; static struct swr_mstr_port_map sm_port_map_wcd937x[] = { {VA_MACRO, SWR_UC0, tx_frame_params_wcd937x}, {RX_MACRO, SWR_UC0, rx_frame_params_default}, {RX_MACRO, SWR_UC1, rx_frame_params_dsd}, {RX_MACRO, SWR_UC2, rx_frame_params_44p1KHz}, }; #endif /* _HOLI_PORT_CONFIG */
asoc/lahaina-port-config.h +12 −0 Original line number Diff line number Diff line Loading @@ -44,6 +44,16 @@ static struct port_params rx_frame_params_default[SWR_MSTR_PORT_LEN] = { {0x18F, 0, 0, 0x8, 0x8, 0x0F, 0x00, 0, 0, 0x00, 0x01}, /* PCM_OUT */ }; /* Headset(44.1K) + PCM Haptics */ static struct port_params rx_frame_params_44p1KHz[SWR_MSTR_PORT_LEN] = { {3, 0, 0, 0xFF, 0xFF, 1, 0xFF, 0xFF, 1, 0x00, 0x00}, /* HPH/EAR */ {63, 0, 0, 3, 6, 7, 0, 0xFF, 0, 0x00, 0x00}, /* HPH_CLH */ {31, 11, 11, 0xFF, 0xFF, 4, 1, 0xFF, 0, 0x00, 0x00}, /* HPH_CMP */ {3, 1, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0x01, 0, 0x00, 0x00}, /* LO/AUX */ {0, 0, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0, 0, 0x00, 0x00}, /* DSD */ {0x1FF, 0, 0, 0x8, 0x8, 0x0F, 0, 0, 0, 0x00, 0x01}, /* PCM_OUT */ }; /* TX UC1: TX1: 1ch, TX2: 2chs, TX3: 1ch(MBHC) */ static struct port_params tx_frame_params_default[SWR_MSTR_PORT_LEN] = { {7, 1, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0, 0x00, 0x00}, /* TX1 */ Loading Loading @@ -92,6 +102,7 @@ static struct swr_mstr_port_map sm_port_map[] = { {TX_MACRO, SWR_UC2, tx_frame_params_0p6MHz}, {RX_MACRO, SWR_UC0, rx_frame_params_default}, {RX_MACRO, SWR_UC1, rx_frame_params_dsd}, {RX_MACRO, SWR_UC2, rx_frame_params_44p1KHz}, {WSA_MACRO, SWR_UC0, wsa_frame_params_default}, }; Loading @@ -101,6 +112,7 @@ static struct swr_mstr_port_map sm_port_map_shima[] = { {TX_MACRO, SWR_UC2, tx_frame_params_shima_0p6MHz}, {RX_MACRO, SWR_UC0, rx_frame_params_default}, {RX_MACRO, SWR_UC1, rx_frame_params_dsd}, {RX_MACRO, SWR_UC2, rx_frame_params_44p1KHz}, {WSA_MACRO, SWR_UC0, wsa_frame_params_default}, }; Loading
include/soc/soundwire.h +1 −1 Original line number Diff line number Diff line Loading @@ -17,7 +17,7 @@ #define SWR_CLK_RATE_2P4MHZ 2400000 #define SWR_CLK_RATE_4P8MHZ 4800000 #define SWR_CLK_RATE_9P6MHZ 9600000 #define SWR_CLK_RATE_11P2896MHZ 1128960 #define SWR_CLK_RATE_11P2896MHZ 11289600 extern struct bus_type soundwire_type; struct swr_device; Loading
soc/swr-mstr-ctrl.c +3 −0 Original line number Diff line number Diff line Loading @@ -752,6 +752,9 @@ static int swrm_get_port_config(struct swr_mstr_ctrl *swrm) if (swrm->mport_cfg[SWRM_DSD_PARAMS_PORT].port_en && (swrm->master_id == MASTER_ID_RX)) usecase = 1; else if ((swrm->master_id == MASTER_ID_RX) && (swrm->bus_clk == SWR_CLK_RATE_11P2896MHZ)) usecase = 2; if (swrm->bus_clk == SWR_CLK_RATE_4P8MHZ) usecase = 1; Loading