Loading bindings/devfreq/arm-memlat-mon.txt 0 → 100644 +31 −0 Original line number Diff line number Diff line ARM CPU memory latency monitor device arm-memlat-mon is a device that represents the use of the PMU in ARM cores to measure the parameters for latency driven memory access patterns. Required properties: - compatible: Must be "qcom,arm-memlat-mon" - qcom,cpulist: List of CPU phandles to be monitored in a cluster - qcom,target-dev: The DT device that corresponds to this master port - qcom,core-dev-table: A mapping table of core frequency to a required bandwidth vote at the given core frequency. Optional properties: - qcom,cachemiss-ev: The cache miss event that this monitor is supposed to measure. Defaults to 0x17 if not specified. - qcom,inst-ev: The instruction count event that this monitor is supposed to measure. Defaults to 0x08 if not specified. Example: qcom,arm-memlat-mon { compatible = "qcom,arm-memlat-mon"; qcom,cpulist = <&CPU0 &CPU1>; qcom,target-dev = <&memlat0>; qcom,cachemiss-ev = <0x2A>; qcom,inst-ev = <0x08>; qcom,core-dev-table = < 300000 1525>, < 499200 3143>, < 1881600 5859>; }; bindings/devfreq/bimc-bwmon.txt +2 −1 Original line number Diff line number Diff line Loading @@ -5,7 +5,8 @@ can be used to measure the bandwidth of read/write traffic from the BIMC master ports. For example, the CPU subsystem sits on one BIMC master port. Required properties: - compatible: Must be "qcom,bimc-bwmon", "qcom,bimc-bwmon2" - compatible: Must be "qcom,bimc-bwmon", "qcom,bimc-bwmon2" or "qcom,bimc-bwmon3" - reg: Pairs of physical base addresses and region sizes of memory mapped registers. - reg-names: Names of the bases for the above registers. Expected Loading bindings/devfreq/devfreq-simple-dev.txt +1 −0 Original line number Diff line number Diff line Loading @@ -14,6 +14,7 @@ Required properties: Optional properties: - polling-ms: Polling interval for the device in milliseconds. Default: 50 - governor: Initial governor to user for the device. Default: "performance" - qcom,prepare-clk: Prepare the device clock during initialization. Example: Loading Loading
bindings/devfreq/arm-memlat-mon.txt 0 → 100644 +31 −0 Original line number Diff line number Diff line ARM CPU memory latency monitor device arm-memlat-mon is a device that represents the use of the PMU in ARM cores to measure the parameters for latency driven memory access patterns. Required properties: - compatible: Must be "qcom,arm-memlat-mon" - qcom,cpulist: List of CPU phandles to be monitored in a cluster - qcom,target-dev: The DT device that corresponds to this master port - qcom,core-dev-table: A mapping table of core frequency to a required bandwidth vote at the given core frequency. Optional properties: - qcom,cachemiss-ev: The cache miss event that this monitor is supposed to measure. Defaults to 0x17 if not specified. - qcom,inst-ev: The instruction count event that this monitor is supposed to measure. Defaults to 0x08 if not specified. Example: qcom,arm-memlat-mon { compatible = "qcom,arm-memlat-mon"; qcom,cpulist = <&CPU0 &CPU1>; qcom,target-dev = <&memlat0>; qcom,cachemiss-ev = <0x2A>; qcom,inst-ev = <0x08>; qcom,core-dev-table = < 300000 1525>, < 499200 3143>, < 1881600 5859>; };
bindings/devfreq/bimc-bwmon.txt +2 −1 Original line number Diff line number Diff line Loading @@ -5,7 +5,8 @@ can be used to measure the bandwidth of read/write traffic from the BIMC master ports. For example, the CPU subsystem sits on one BIMC master port. Required properties: - compatible: Must be "qcom,bimc-bwmon", "qcom,bimc-bwmon2" - compatible: Must be "qcom,bimc-bwmon", "qcom,bimc-bwmon2" or "qcom,bimc-bwmon3" - reg: Pairs of physical base addresses and region sizes of memory mapped registers. - reg-names: Names of the bases for the above registers. Expected Loading
bindings/devfreq/devfreq-simple-dev.txt +1 −0 Original line number Diff line number Diff line Loading @@ -14,6 +14,7 @@ Required properties: Optional properties: - polling-ms: Polling interval for the device in milliseconds. Default: 50 - governor: Initial governor to user for the device. Default: "performance" - qcom,prepare-clk: Prepare the device clock during initialization. Example: Loading