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Commit 3e394f94 authored by Lijun Ou's avatar Lijun Ou Committed by Jason Gunthorpe
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RDMA/hns: Modify qp&cq&pd specification according to UM 



Accroding to hip08's limitation, qp&cq specification is 1M, mtpt
specification 1M in kernel space.

Signed-off-by: default avatarYangyang Li <liyangyang20@huawei.com>
Signed-off-by: default avatarLijun Ou <oulijun@huawei.com>
Signed-off-by: default avatarJason Gunthorpe <jgg@mellanox.com>
parent 4133b013

drivers/infiniband/hw/hns/hns_roce_hw_v2.h

+5 −5
Original line number Diff line number Diff line
@@ -45,13 +45,13 @@ 
#define HNS_ROCE_VF_SGID_NUM			32

#define HNS_ROCE_VF_SL_NUM			8



#define HNS_ROCE_V2_MAX_QP_NUM			0x2000

#define HNS_ROCE_V2_MAX_QP_NUM			0x100000

#define HNS_ROCE_V2_MAX_QPC_TIMER_NUM		0x200

#define HNS_ROCE_V2_MAX_WQE_NUM			0x8000

#define	HNS_ROCE_V2_MAX_SRQ			0x100000

#define HNS_ROCE_V2_MAX_SRQ_WR			0x8000

#define HNS_ROCE_V2_MAX_SRQ_SGE			0x100

#define HNS_ROCE_V2_MAX_CQ_NUM			0x8000

#define HNS_ROCE_V2_MAX_CQ_NUM			0x100000

#define HNS_ROCE_V2_MAX_CQC_TIMER_NUM		0x100

#define HNS_ROCE_V2_MAX_SRQ_NUM			0x100000

#define HNS_ROCE_V2_MAX_CQE_NUM			0x10000
@@ -67,7 +67,7 @@ 
#define HNS_ROCE_V2_COMP_VEC_NUM		63

#define HNS_ROCE_V2_AEQE_VEC_NUM		1

#define HNS_ROCE_V2_ABNORMAL_VEC_NUM		1

#define HNS_ROCE_V2_MAX_MTPT_NUM		0x8000

#define HNS_ROCE_V2_MAX_MTPT_NUM		0x100000

#define HNS_ROCE_V2_MAX_MTT_SEGS		0x1000000

#define HNS_ROCE_V2_MAX_CQE_SEGS		0x1000000

#define HNS_ROCE_V2_MAX_SRQWQE_SEGS		0x1000000