+8
−0
drivers/clk/qcom/kpss-xcc.c
0 → 100644
+87
−0
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The ACC and GCC regions present in KPSSv1 contain registers to control clocks and power to each Krait CPU and L2. For CPUfreq purposes probe these devices and expose a mux clock that chooses between PXO and PLL8. Cc: <devicetree@vger.kernel.org> Signed-off-by:Stephen Boyd <sboyd@codeaurora.org> Signed-off-by:
Sricharan R <sricharan@codeaurora.org> Tested-by:
Craig Tatlor <ctatlor97@gmail.com> Signed-off-by:
Stephen Boyd <sboyd@kernel.org>