Merge "dt-bindings: clock: Add support for GPUCC PLL0"

#define _DT_BINDINGS_CLK_QCOM_GPU_CC_SHIMA_H

/* GPU_CC clocks */

#define GPU_CC_PLL1						0

#define GPU_CC_AHB_CLK						1

#define GPU_CC_CB_CLK						2

#define GPU_CC_CRC_AHB_CLK					3

#define GPU_CC_CX_APB_CLK					4

#define GPU_CC_CX_GMU_CLK					5

#define GPU_CC_CX_SNOC_DVM_CLK					6

#define GPU_CC_CXO_AON_CLK					7

#define GPU_CC_CXO_CLK						8

#define GPU_CC_GMU_CLK_SRC					9

#define GPU_CC_GX_GMU_CLK					10

#define GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK				11

#define GPU_CC_HUB_AHB_DIV_CLK_SRC				12

#define GPU_CC_HUB_AON_CLK					13

#define GPU_CC_HUB_CLK_SRC					14

#define GPU_CC_HUB_CX_INT_CLK					15

#define GPU_CC_HUB_CX_INT_DIV_CLK_SRC				16

#define GPU_CC_MND1X_0_GFX3D_CLK				17

#define GPU_CC_MND1X_1_GFX3D_CLK				18

#define GPU_CC_SLEEP_CLK					19

#define GPU_CC_PLL0						0

#define GPU_CC_PLL1						1

#define GPU_CC_AHB_CLK						2

#define GPU_CC_CB_CLK						3

#define GPU_CC_CRC_AHB_CLK					4

#define GPU_CC_CX_APB_CLK					5

#define GPU_CC_CX_GMU_CLK					6

#define GPU_CC_CX_SNOC_DVM_CLK					7

#define GPU_CC_CXO_AON_CLK					8

#define GPU_CC_CXO_CLK						9

#define GPU_CC_GMU_CLK_SRC					10

#define GPU_CC_GX_GMU_CLK					11

#define GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK				12

#define GPU_CC_HUB_AHB_DIV_CLK_SRC				13

#define GPU_CC_HUB_AON_CLK					14

#define GPU_CC_HUB_CLK_SRC					15

#define GPU_CC_HUB_CX_INT_CLK					16

#define GPU_CC_HUB_CX_INT_DIV_CLK_SRC				17

#define GPU_CC_MND1X_0_GFX3D_CLK				18

#define GPU_CC_MND1X_1_GFX3D_CLK				19

#define GPU_CC_SLEEP_CLK					20

#endif