Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Unverified Commit 3d77a95f authored by Paul Burton's avatar Paul Burton
Browse files

MIPS: Drop Loongson _CACHE_* definitions



_CACHE_CACHABLE_NONCOHERENT is defined as 3<<_CACHE_SHIFT by default, so
there's no need to define it as such specifically for Loongson.

_CACHE_CACHABLE_COHERENT is not used anywhere in the kernel, so there's
no need to define it at all.

Finally the comment found alongside these definitions seems incorrect -
it suggests that we're defining _CACHE_CACHABLE_NONCOHERENT such that it
actually provides coherence, but the opposite seems to be true & instead
the unused _CACHE_CACHABLE_COHERENT is defined as the typically
incoherent value.

Delete the whole thing, which will have no effect on the compiled code
anyway.

Signed-off-by: default avatarPaul Burton <paul.burton@mips.com>
Reviewed-by: default avatarPhilippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: default avatarJiaxun Yang <jiaxun.yang@flygoat.com>
Cc: Huacai Chen <chenhc@lemote.com>
Cc: linux-mips@vger.kernel.org
parent 775b089a
Loading
Loading
Loading
Loading
+0 −7
Original line number Diff line number Diff line
@@ -221,13 +221,6 @@ static inline uint64_t pte_to_entrylo(unsigned long pte_val)

#define _CACHE_CACHABLE_NONCOHERENT (5<<_CACHE_SHIFT)

#elif defined(CONFIG_CPU_LOONGSON3)

/* Using COHERENT flag for NONCOHERENT doesn't hurt. */

#define _CACHE_CACHABLE_NONCOHERENT (3<<_CACHE_SHIFT)  /* LOONGSON       */
#define _CACHE_CACHABLE_COHERENT    (3<<_CACHE_SHIFT)  /* LOONGSON-3     */

#elif defined(CONFIG_MACH_INGENIC)

/* Ingenic uses the WA bit to achieve write-combine memory writes */